On 06/23/2017 03:30 AM, Priyanka Jain wrote:
> Update MC address caluclation as per MC design requirement
> of address as least significant 512MB address
> of MC private allocated memory.
>
> Signed-off-by: Priyanka Jain <priyanka.j...@nxp.com>
> Signed-off-by: Ashish Kumar <ashish.ku...@nxp.com>
> ---
> drivers/net/fsl-mc/mc.c | 7 ++++++-
> 1 files changed, 6 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
> index eeecb2d..623586c 100644
> --- a/drivers/net/fsl-mc/mc.c
> +++ b/drivers/net/fsl-mc/mc.c
> @@ -704,10 +704,15 @@ int get_dpl_apply_status(void)
>
> /**
> * Return the MC address of private DRAM block.
> + * MC address should be least significant 512MB address
> + * of MC private memory
> */
> u64 mc_get_dram_addr(void)
> {
> - return gd->arch.resv_ram;
> + size_t mc_ram_size = mc_get_dram_block_size();
> +
> + return (gd->arch.resv_ram + mc_ram_size - 1) &
> + MC_RAM_BASE_ADDR_ALIGNMENT_MASK;
> }
>
> /**
>
Priyanka,
This looks odd. You already have the address aligned by
CONFIG_SYS_MC_RSV_MEM_ALIGN (512MB by default), tracked by
gd->arch.resv_ram. Did you find the address is wrong sometimes?
York
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