On 07/09/2017 07:41 PM, Ran Wang wrote:
> Rx Compliance tests may fail intermittently at high
> jitter frequencies using default register values
>
> Changes identified in test setup makes the Rx compliance test pass
>
> Signed-off-by: Sriram Dash <sriram.d...@nxp.com>
> Signed-off-by: Rajesh Bhagat <rajesh.bha...@nxp.com>
> Signed-off-by: Suresh Gupta <suresh.bha...@nxp.com>
> Signed-off-by: Ran Wang <ran.wan...@nxp.com>
> ---
> arch/arm/cpu/armv7/ls102xa/Kconfig | 6 ++++++
> arch/arm/cpu/armv7/ls102xa/soc.c | 11 +++++++++++
> arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 7 +++++++
> 3 files changed, 24 insertions(+)
>
> diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig
> b/arch/arm/cpu/armv7/ls102xa/Kconfig
> index 4f2e86e..236addb 100644
> --- a/arch/arm/cpu/armv7/ls102xa/Kconfig
> +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
> @@ -8,6 +8,7 @@ config ARCH_LS1021A
> select SYS_FSL_ERRATUM_A009008
> select SYS_FSL_ERRATUM_A009798
> select SYS_FSL_ERRATUM_A008997
> + select SYS_FSL_ERRATUM_A009007
> select SYS_FSL_SRDS_1
> select SYS_HAS_SERDES
> select SYS_FSL_DDR_BE if SYS_FSL_DDR
> @@ -68,6 +69,11 @@ config SYS_FSL_ERRATUM_A008997
> help
> Workaround for USB PHY erratum A008997
>
> +config SYS_FSL_ERRATUM_A009007
> + bool
> + help
> + Workaround for USB PHY erratum A009007
> +
> config SYS_FSL_SRDS_1
> bool
>
> diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c
> b/arch/arm/cpu/armv7/ls102xa/soc.c
> index 15b2299..88219ec 100644
> --- a/arch/arm/cpu/armv7/ls102xa/soc.c
> +++ b/arch/arm/cpu/armv7/ls102xa/soc.c
> @@ -90,6 +90,16 @@ static void erratum_a008997(void)
> #endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */
> }
>
> +static void erratum_a009007(void)
> +{
> +#ifdef CONFIG_SYS_FSL_ERRATUM_A009007
> + void __iomem *usb_phy = (void __iomem *)USB_PHY_BASE;
Put a blank line here.
York
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