Hi Simon, On Sat, Jul 22, 2017 at 7:11 AM, Simon Glass <s...@chromium.org> wrote: > This converts the following to Kconfig: > CONFIG_CMD_SF_TEST > > Signed-off-by: Simon Glass <s...@chromium.org> > --- > > README | 6 ------ > arch/Kconfig | 1 + > arch/x86/cpu/baytrail/Kconfig | 1 + > cmd/Kconfig | 11 +++++++++++ > configs/chromebit_mickey_defconfig | 1 + > configs/chromebook_jerry_defconfig | 1 + > configs/chromebook_link64_defconfig | 1 + > configs/chromebook_link_defconfig | 1 + > configs/chromebook_minnie_defconfig | 1 + > configs/chromebook_samus_defconfig | 1 + > configs/chromebox_panther_defconfig | 1 + > configs/coreboot-x86_defconfig | 1 + > configs/cougarcanyon2_defconfig | 1 + > configs/crownbay_defconfig | 1 + > configs/galileo_defconfig | 1 + > configs/qemu-x86_64_defconfig | 1 + > configs/qemu-x86_defconfig | 1 + > configs/qemu-x86_efi_payload32_defconfig | 1 + > configs/qemu-x86_efi_payload64_defconfig | 1 + > configs/sandbox_defconfig | 4 +--- > include/configs/efi-x86.h | 2 -- > include/configs/sandbox.h | 1 - > include/configs/veyron.h | 2 -- > include/configs/x86-common.h | 1 - > scripts/config_whitelist.txt | 1 - > 25 files changed, 29 insertions(+), 16 deletions(-) > > diff --git a/README b/README > index 3958821f57..d0d6fe2b8d 100644 > --- a/README > +++ b/README > @@ -2506,12 +2506,6 @@ The following options need to be configured: > CONFIG_SF_DEFAULT_MODE (see include/spi.h) > CONFIG_SF_DEFAULT_SPEED in Hz > > - CONFIG_CMD_SF_TEST > - > - Define this option to include a destructive SPI flash > - test ('sf test'). > - > -- SystemACE Support: > CONFIG_SYSTEMACE > > Adding this option adds support for Xilinx SystemACE > diff --git a/arch/Kconfig b/arch/Kconfig > index 7e76abdbf3..a3c9b99ea5 100644 > --- a/arch/Kconfig > +++ b/arch/Kconfig > @@ -77,6 +77,7 @@ config SANDBOX > imply LZMA > imply SCSI > imply CMD_SATA > + imply CMD_SF_TEST > > config SH > bool "SuperH architecture" > diff --git a/arch/x86/cpu/baytrail/Kconfig b/arch/x86/cpu/baytrail/Kconfig > index 6c85186486..31e988c6ea 100644 > --- a/arch/x86/cpu/baytrail/Kconfig > +++ b/arch/x86/cpu/baytrail/Kconfig > @@ -7,6 +7,7 @@ > config INTEL_BAYTRAIL > bool > select HAVE_FSP if !EFI > + imply CMD_SF_TEST
How about imply this for X86? > > if INTEL_BAYTRAIL > config INTERNAL_UART > diff --git a/cmd/Kconfig b/cmd/Kconfig > index 28aba0e780..d01fda2450 100644 > --- a/cmd/Kconfig > +++ b/cmd/Kconfig > @@ -811,6 +811,17 @@ config CMD_SDRAM > SDRAM has an EEPROM with information that can be read using the > I2C bus. This is only available on some boards. > > +config CMD_SF_TEST > + bool "sf test - Allow testing of SPI flash" > + help > + Provides a way to test that SPI flash is working correctly. the nits: the -> The > + test is destructive, in that an area of SPI flash must be provided > + for the test to use. Performance informatoin is also provided, typo: information > + measuring the performance of reading, writing and erasing in > + Mbps (Million Bits Per Second). This value shold approximately typo: should > + equal the SPI bus speed for a single-bit-wide SPI bus, assuming > + everything is working properly. > + > endmenu > [snip] Regards, Bin _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot