2017-07-13 5:23 GMT+02:00 Andy Yan <andy....@rock-chips.com>: > Some platforms has very small sram to run spl code, so > it may have no enough sapce for so much malloc pool before > relocation in spl stage as the normal u-boot stage. > > Signed-off-by: Andy Yan <andy....@rock-chips.com> > --- > > Changes in v2: None > > arch/mips/cpu/start.S | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) >
Acked-by: Daniel Schwierzeck <daniel.schwierz...@gmail.com> > diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S > index d01ee9f..0cc140b 100644 > --- a/arch/mips/cpu/start.S > +++ b/arch/mips/cpu/start.S > @@ -60,8 +60,12 @@ > sp, sp, GD_SIZE # reserve space for gd > and sp, sp, t0 # force 16 byte alignment > move k0, sp # save gd pointer > -#ifdef CONFIG_SYS_MALLOC_F_LEN > +#ifdef CONFIG_SYS_MALLOC_F > +# ifdef CONFIG_SPL_BUILD > + li t2, CONFIG_SPL_SYS_MALLOC_F_LEN > +# else > li t2, CONFIG_SYS_MALLOC_F_LEN > +# endif > PTR_SUBU \ > sp, sp, t2 # reserve space for early malloc > and sp, sp, t0 # force 16 byte alignment > @@ -75,7 +79,7 @@ > blt t0, t1, 1b > PTR_ADDIU t0, PTRSIZE > > -#ifdef CONFIG_SYS_MALLOC_F_LEN > +#ifdef CONFIG_SYS_MALLOC_F > PTR_S sp, GD_MALLOC_BASE(k0) # gd->malloc_base offset > #endif > .endm > -- > 2.7.4 > > _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
