Dear Nick Thompson, In message <4af9823c.8090...@gefanuc.com> you wrote: > Provides initial support for TI OMAP-L1x/DA8xx SoC devices. > See http://www.ti.com > > The DA8xx devices are similar to DaVinci devices but have a differing > memory map and updated peripheral versions. > > Signed-off-by: Nick Thompson <nick.thomp...@gefanuc.com> > Signed-off-by: Sekhar Nori <nsek...@ti.com> ... > +enum davinci_lpsc_ids { > + DAVINCI_LPSC_TPCC = 0, > + DAVINCI_LPSC_TPTC0, > + DAVINCI_LPSC_TPTC1, > + DAVINCI_LPSC_AEMIF, > + DAVINCI_LPSC_SPI0, > + DAVINCI_LPSC_MMC_SD, > + DAVINCI_LPSC_AINTC, > + DAVINCI_LPSC_ARM_RAM_ROM, > + DAVINCI_LPSC_SECCTL_KEYMGR, > + DAVINCI_LPSC_UART0, > + DAVINCI_LPSC_SCR0, > + DAVINCI_LPSC_SCR1, > + DAVINCI_LPSC_SCR2, > + DAVINCI_LPSC_DMAX, > + DAVINCI_LPSC_ARM, > + DAVINCI_LPSC_GEM, > + /* for LPSCs in PSC1, offset from 32 for differentiation */ > + DAVINCI_LPSC_PSC1_BASE = 32, > + DAVINCI_LPSC_USB11, > + DAVINCI_LPSC_USB20, > + DAVINCI_LPSC_GPIO, > + DAVINCI_LPSC_UHPI, > + DAVINCI_LPSC_EMAC, > + DAVINCI_LPSC_DDR_EMIF, > + DAVINCI_LPSC_McASP0, > + DAVINCI_LPSC_McASP1, > + DAVINCI_LPSC_McASP2, > + DAVINCI_LPSC_SPI1, > + DAVINCI_LPSC_I2C1, > + DAVINCI_LPSC_UART1, > + DAVINCI_LPSC_UART2, > + DAVINCI_LPSC_LCDC, > + DAVINCI_LPSC_ePWM, > + DAVINCI_LPSC_eCAP, > + DAVINCI_LPSC_eQEP, > + DAVINCI_LPSC_SCR_P0, > + DAVINCI_LPSC_SCR_P1, > + DAVINCI_LPSC_CR_P3, > + DAVINCI_LPSC_L3_CBA_RAM > +};
Variable names must be lower case. Please fix. Also, it is good tradition to ad a comma to the last entry, too. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Given a choice between two theories, take the one which is funnier. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
