Signed-off-by: Christophe Leroy <christophe.le...@c-s.fr>
---
README | 19 ------
arch/powerpc/cpu/mpc8xx/Makefile | 1 -
drivers/serial/Kconfig | 72 ++++++++++++++++++++++
drivers/serial/Makefile | 1 +
.../serial.c => drivers/serial/serial_mpc8xx.c | 15 -----
scripts/config_whitelist.txt | 9 ---
6 files changed, 73 insertions(+), 44 deletions(-)
rename arch/powerpc/cpu/mpc8xx/serial.c => drivers/serial/serial_mpc8xx.c (97%)
diff --git a/README b/README
index 4eeda3f7fe..c5ddf326b3 100644
--- a/README
+++ b/README
@@ -691,29 +691,10 @@ The following options need to be configured:
Define this variable to enable hw flow control in serial driver.
Current user of this option is drivers/serial/nsl16550.c driver
-- Console Interface:
- Depending on board, define exactly one serial port
- (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,
- CONFIG_8xx_CONS_SCC1, ...), or switch off the serial
- console by defining CONFIG_8xx_CONS_NONE
-
- Note: if CONFIG_8xx_CONS_NONE is defined, the serial
- port routines must be defined elsewhere
- (i.e. serial_init(), serial_getc(), ...)
-
- Console Baudrate:
CONFIG_BAUDRATE - in bps
Select one of the baudrates listed in
CONFIG_SYS_BAUDRATE_TABLE, see below.
- CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale
-
-- Console Rx buffer length
- With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
- the maximum receive buffer length for the SMC.
- This option is actual only for 8xx possible.
- If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
- must be defined, to setup the maximum idle timeout for
- the SMC.
- Autoboot Command:
CONFIG_BOOTCOMMAND
diff --git a/arch/powerpc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile
index 9f62454dfb..a56eeeeb6b 100644
--- a/arch/powerpc/cpu/mpc8xx/Makefile
+++ b/arch/powerpc/cpu/mpc8xx/Makefile
@@ -14,6 +14,5 @@ obj-y += cpu_init.o
obj-$(CONFIG_OF_LIBFDT) += fdt.o
obj-y += interrupts.o
obj-$(CONFIG_CMD_REGINFO) += reginfo.o
-obj-y += serial.o
obj-y += speed.o
obj-y += plprcr_write.o
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index c64f4a6d7b..cea39ce3c7 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -491,4 +491,76 @@ config STI_ASC_SERIAL
on STiH410 SoC. This is a basic implementation, it supports
following baudrate 9600, 19200, 38400, 57600 and 115200.
+config MPC8XX_CONS
+ bool "Console driver for MPC8XX"
+ depends on 8xx
+ default y
+
+choice
+ prompt "Console port"
+ default 8xx_CONS_SMC1
+ depends on MPC8XX_CONS
+ help
+ Depending on board, define exactly one serial port
+ (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,
+ CONFIG_8xx_CONS_SCC1, ...)
+
+config 8xx_CONS_SMC1
+ bool "SMC1"
+
+config 8xx_CONS_SMC2
+ bool "SMC2"
+
+config 8xx_CONS_SCC1
+ bool "SCC1"
+
+config 8xx_CONS_SCC2
+ bool "SCC2"
+
+config 8xx_CONS_SCC3
+ bool "SCC3"
+
+config 8xx_CONS_SCC4
+ bool "SCC4"
+
+endchoice
+
+config SYS_SMC_RXBUFLEN
+ int "Console Rx buffer length"
+ depends on MPC8XX_CONS
+ default 1
+ help
+ With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
+ the maximum receive buffer length for the SMC.
+ This option is actual only for 8xx possible.
+ If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
+ must be defined, to setup the maximum idle timeout for
+ the SMC.
+
+config SYS_MAXIDLE
+ int "maximum idle timeout"
+ depends on MPC8XX_CONS
+ default 0
+
+config SYS_BRGCLK_PRESCALE
+ int "BRG Clock Prescale"
+ depends on MPC8XX_CONS
+ default 1
+
+config SYS_SDSR_BOOL
+ bool "Define SRSR value"
+ depends on 8xx_CONS_SMC1 || 8xx_CONS_SMC2
+
+config SYS_SDSR
+ hex "SDSR Value"
+ depends on SYS_SDSR_BOOL
+
+config SYS_SDMR_BOOL
+ bool "Define SRMR value"
+ depends on 8xx_CONS_SMC1 || 8xx_CONS_SMC2
+
+config SYS_SDMR
+ hex "SDMR Value"
+ depends on SYS_SDMR_BOOL
+
endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index dca31b295c..72a6996a0a 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -48,6 +48,7 @@ obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
obj-$(CONFIG_MSM_SERIAL) += serial_msm.o
obj-$(CONFIG_MVEBU_A3700_UART) += serial_mvebu_a3700.o
+obj-$(CONFIG_MPC8XX_CONS) += serial_mpc8xx.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/arch/powerpc/cpu/mpc8xx/serial.c b/drivers/serial/serial_mpc8xx.c
similarity index 97%
rename from arch/powerpc/cpu/mpc8xx/serial.c
rename to drivers/serial/serial_mpc8xx.c
index 2519156d4b..5271a3fe1b 100644
--- a/arch/powerpc/cpu/mpc8xx/serial.c
+++ b/drivers/serial/serial_mpc8xx.c
@@ -14,8 +14,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#if !defined(CONFIG_8xx_CONS_NONE) /* No Console at all */
-
#if defined(CONFIG_8xx_CONS_SMC1) /* Console on SMC1 */
#define SMC_INDEX 0
#define PROFF_SMC PROFF_SMC1
@@ -50,15 +48,6 @@ DECLARE_GLOBAL_DATA_PTR;
#endif /* CONFIG_8xx_CONS_SCCx */
-#if !defined(CONFIG_SYS_SMC_RXBUFLEN)
-#define CONFIG_SYS_SMC_RXBUFLEN 1
-#define CONFIG_SYS_MAXIDLE 0
-#else
-#if !defined(CONFIG_SYS_MAXIDLE)
-#error "you must define CONFIG_SYS_MAXIDLE"
-#endif
-#endif
-
typedef volatile struct serialbuffer {
cbd_t rxbd; /* Rx BD */
cbd_t txbd; /* Tx BD */
@@ -76,9 +65,7 @@ static void serial_setdivisor(volatile cpm8xx_t *cp)
divisor=(50*1000*1000 + 8*9600)/16/9600;
}
-#ifdef CONFIG_SYS_BRGCLK_PRESCALE
divisor /= CONFIG_SYS_BRGCLK_PRESCALE;
-#endif
if(divisor<=0x1000) {
cp->cp_brgc1=((divisor-1)<<1) | CPM_BRG_EN;
@@ -560,5 +547,3 @@ void mpc8xx_serial_initialize(void)
serial_register(&serial_scc_device);
#endif
}
-
-#endif /* CONFIG_8xx_CONS_NONE */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index f51dd4fa17..00b9cbf949 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -12,11 +12,6 @@ CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES
CONFIG_83XX_PCICLK
CONFIG_83XX_PCI_STREAMING
CONFIG_88F5182
-CONFIG_8xx_CONS_NONE
-CONFIG_8xx_CONS_SCCx
-CONFIG_8xx_CONS_SMC1
-CONFIG_8xx_CONS_SMC2
-CONFIG_8xx_CONS_SMCx
CONFIG_A003399_NOR_WORKAROUND
CONFIG_A008044_WORKAROUND
CONFIG_ACADIA
@@ -2660,7 +2655,6 @@ CONFIG_SYS_BR6_64M
CONFIG_SYS_BR6_8M
CONFIG_SYS_BR6_PRELIM
CONFIG_SYS_BR7_PRELIM
-CONFIG_SYS_BRGCLK_PRESCALE
CONFIG_SYS_BUSCLK
CONFIG_SYS_CACHELINE_SHIFT
CONFIG_SYS_CACHE_ACR0
@@ -5087,7 +5081,6 @@ CONFIG_SYS_SDIO_BASE0
CONFIG_SYS_SDIO_BASE1
CONFIG_SYS_SDIO_BASE2
CONFIG_SYS_SDIO_BASE3
-CONFIG_SYS_SDMR
CONFIG_SYS_SDRAM
CONFIG_SYS_SDRAM1
CONFIG_SYS_SDRAM_BANKS
@@ -5136,7 +5129,6 @@ CONFIG_SYS_SDRC_MR_VAL5
CONFIG_SYS_SDRC_TR_VAL
CONFIG_SYS_SDRC_TR_VAL1
CONFIG_SYS_SDRC_TR_VAL2
-CONFIG_SYS_SDSR
CONFIG_SYS_SD_VOLTAGE
CONFIG_SYS_SEC_MON_ADDR
CONFIG_SYS_SEC_MON_OFFSET
@@ -5171,7 +5163,6 @@ CONFIG_SYS_SMC0_MODE0_VAL
CONFIG_SYS_SMC0_PULSE0_VAL
CONFIG_SYS_SMC0_SETUP0_VAL
CONFIG_SYS_SMC_CSR0_VAL
-CONFIG_SYS_SMC_RXBUFLEN
CONFIG_SYS_SMI_BASE
CONFIG_SYS_SPANSION_BASE
CONFIG_SYS_SPANSION_BOOT
--
2.12.0
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