Any comments on this?
Mike Rapoport wrote:
> There are several presets for GPMC registers defined in
> include/asm-arm/arch-omap3/mem.h. Allow selection between SMNAND and
> M_NAND presets based on OMAP34XX_GPMC_NAND_<PART> defines
>
> Signed-off-by: Mike Rapoport <m...@compulab.co.il>
> ---
> cpu/arm_cortexa8/omap3/mem.c | 25 ++++++++++++++++---------
> 1 files changed, 16 insertions(+), 9 deletions(-)
>
> diff --git a/cpu/arm_cortexa8/omap3/mem.c b/cpu/arm_cortexa8/omap3/mem.c
> index 8b8cd6d..2bd7e1c 100644
> --- a/cpu/arm_cortexa8/omap3/mem.c
> +++ b/cpu/arm_cortexa8/omap3/mem.c
> @@ -44,14 +44,21 @@ volatile unsigned int boot_flash_env_addr;
> struct gpmc *gpmc_cfg;
>
> #if defined(CONFIG_CMD_NAND)
> -static const u32 gpmc_m_nand[GPMC_MAX_REG] = {
> - M_NAND_GPMC_CONFIG1,
> - M_NAND_GPMC_CONFIG2,
> - M_NAND_GPMC_CONFIG3,
> - M_NAND_GPMC_CONFIG4,
> - M_NAND_GPMC_CONFIG5,
> - M_NAND_GPMC_CONFIG6, 0
> -};
> +#define GPMC_NAND(PART) \
> + static const u32 gpmc_nand[GPMC_MAX_REG] = { \
> + PART##_GPMC_CONFIG1, \
> + PART##_GPMC_CONFIG2, \
> + PART##_GPMC_CONFIG3, \
> + PART##_GPMC_CONFIG4, \
> + PART##_GPMC_CONFIG5, \
> + PART##_GPMC_CONFIG6, 0 \
> + };
> +
> +#ifdef OMAP34XX_GPMC_NAND_SMNAND
> +GPMC_NAND(SMNAND)
> +#else
> +GPMC_NAND(M_NAND)
> +#endif
>
> #if defined(CONFIG_ENV_IS_IN_NAND)
> #define GPMC_CS 0
> @@ -246,7 +253,7 @@ void gpmc_init(void)
> sdelay(1000);
>
> #if defined(CONFIG_CMD_NAND) /* CS 0 */
> - gpmc_config = gpmc_m_nand;
> + gpmc_config = gpmc_nand;
>
> base = PISMO1_NAND_BASE;
> size = PISMO1_NAND_SIZE;
--
Sincerely yours,
Mike.
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