On Fri, Jun 16, 2017 at 10:43 PM, Siarhei Siamashka <siarhei.siamas...@gmail.com> wrote: > On Fri, 16 Jun 2017 21:54:47 +0530 > Jagan Teki <jagannadh.t...@gmail.com> wrote: > >> Hi Tom, >> >> Please pull this PR. >> >> thanks! >> Jagan. >> >> The following changes since commit 24796d27be0d0f403ed6ad7e3022b33e36ac08b5: >> >> Merge git://git.denx.de/u-boot-ubi (2017-06-06 07:13:39 -0400) >> >> are available in the git repository at: >> >> git://git.denx.de/u-boot-sunxi.git master >> >> for you to fetch changes up to 2b1a33213e810f43f9d7e33b9d8db99e1b80a1c0: >> >> sun50i: h5: Add initial NanoPi NEO2 support (2017-06-14 20:25:56 +0530) >> >> ---------------------------------------------------------------- >> Chen-Yu Tsai (1): >> sunxi: psci: Move entry address setting to separate function >> >> Icenowy Zheng (12): >> sunxi: makes an invisible option for H3-like DRAM controllers >> sunxi: Rename bus-width related macros in H3 DRAM code >> sunxi: add option for 16-bit DW DRAM controller >> sunxi: add bank detection code to H3 DRAM initialization code >> sunxi: Add selective DRAM type and timing >> sunxi: enable dual rank detection in DesignWare-like DRAM code >> sunxi: add support for the DDR2 in V3s SoC >> sunxi: add support for V3s DRAM controller >> sunxi: enable DRAM initialization and SPL for V3s SoC >> sunxi: add LPDDR3 DRAM type support for DesignWare-like DRAM controller >> sunxi: add LPDDR3 timing from stock boot0 >> sunxi: add a defconfig for SoPine w/ official baseboard > > Isn't this rather invasive change (a) still under review > and (b) scheduled for the next merge window either way?
NO, Initial patches were send during MW we waited there too and applied on -sunxi/master weeks ago. Better please send any patches if you find any issues. thanks! -- Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
