Hi Pawel,
On 7 June 2017 at 09:44, Paweł Jarosz <paweljarosz3...@gmail.com> wrote:
> Hi Simon,
>
>
> W dniu 06.06.2017 o 23:10, Simon Glass pisze:
>
>> Hi Pawel,
>>
>> On 6 June 2017 at 12:53, Paweł Jarosz <paweljarosz3...@gmail.com> wrote:
>>>
>>> Add sdram initialisation code which will be ussed by tpl first boot
>>> stage.
>>> We need to implement sdram initialisation in tpl due to size issues on
>>> rk3066
>>> platform.
>>>
>>> Signed-off-by: Paweł Jarosz <paweljarosz3...@gmail.com>
>>> ---
>>> arch/arm/include/asm/arch-rockchip/ddr_rk3188.h | 5 +
>>> arch/arm/mach-rockchip/rk3066/sdram_init.c | 995
>>> ++++++++++++++++++++++++
>>> 2 files changed, 1000 insertions(+)
>>> create mode 100644 arch/arm/mach-rockchip/rk3066/sdram_init.c
>>>
>>> diff --git a/arch/arm/include/asm/arch-rockchip/ddr_rk3188.h
>>> b/arch/arm/include/asm/arch-rockchip/ddr_rk3188.h
>>> index 3d7929f..74d11c6 100644
>>> --- a/arch/arm/include/asm/arch-rockchip/ddr_rk3188.h
>>> +++ b/arch/arm/include/asm/arch-rockchip/ddr_rk3188.h
>>> @@ -10,6 +10,11 @@
>>> #include <asm/arch/ddr_rk3288.h>
>>>
>>> /*
>>> + * RK3066 Tpl memory init.
>>> + */
>>> +void sdram_initialise(void);
>>> +
>>> +/*
>>> * RK3188 Memory scheduler register map.
>>> */
>>> struct rk3188_msch {
>>> diff --git a/arch/arm/mach-rockchip/rk3066/sdram_init.c
>>> b/arch/arm/mach-rockchip/rk3066/sdram_init.c
>>> new file mode 100644
>>> index 0000000..e7e506a
>>> --- /dev/null
>>> +++ b/arch/arm/mach-rockchip/rk3066/sdram_init.c
>>> @@ -0,0 +1,995 @@
>>> +/*
>>> + * (C) Copyright 2015 Google, Inc
>>> + * Copyright 2014 Rockchip Inc.
>>> + *
>>> + * SPDX-License-Identifier: GPL-2.0
>>> + *
>>> + * Adapted from the very similar rk3288 ddr init.
>>> + */
>>> +
>>> +#include <common.h>
>>> +#include <clk.h>
>>> +#include <errno.h>
>>> +#include <ram.h>
>>> +#include <asm/io.h>
>>> +#include <asm/arch/clock.h>
>>> +#include <asm/arch/cru_rk3066.h>
>>> +#include <asm/arch/ddr_rk3188.h>
>>> +#include <asm/arch/grf_rk3066.h>
>>> +#include <asm/arch/pmu_rk3188.h>
>>> +#include <asm/arch/sdram.h>
>>> +#include <linux/err.h>
>>> +
>>> +DECLARE_GLOBAL_DATA_PTR;
>>> +
>>> +struct pll_div {
>>> + u32 nr;
>>> + u32 nf;
>>> + u32 no;
>>> +};
>>> +
>>> +enum {
>>> + VCO_MAX_HZ = 1416U * 1000000,
>>> + VCO_MIN_HZ = 300 * 1000000,
>>> + OUTPUT_MAX_HZ = 1416U * 1000000,
>>> + OUTPUT_MIN_HZ = 30 * 1000000,
>>> + FREF_MAX_HZ = 1416U * 1000000,
>>> + FREF_MIN_HZ = 30 * 1000,
>>> +};
>>> +
>>> +enum {
>>> + /* PLL CON0 */
>>> + PLL_OD_MASK = 0x0f,
>>> +
>>> + /* PLL CON1 */
>>> + PLL_NF_MASK = 0x1fff,
>>> +
>>> + /* PLL CON2 */
>>> + PLL_BWADJ_MASK = 0x0fff,
>>> +
>>> + /* PLL CON3 */
>>> + PLL_RESET_SHIFT = 5,
>>> +
>>> + /* GRF_SOC_STATUS0 */
>>> + SOCSTS_DPLL_LOCK = 1 << 4,
>>> + SOCSTS_APLL_LOCK = 1 << 5,
>>> + SOCSTS_CPLL_LOCK = 1 << 6,
>>> + SOCSTS_GPLL_LOCK = 1 << 7,
>>> +};
>>> +
>>> +#define CRU_BASE 0x20000000
>>> +#define GRF_BASE 0x20008000
>>> +#define PMU_BASE 0x20004000
>>> +#define PCTL_BASE 0x20020000
>>> +#define PUBL_BASE 0x20040000
>>> +#define NOC_BASE 0x10128000
>>
>> I'm assume we cannot use the DT / syscon because of space constraints?
>
> Correct.
>>>
>>> +
>>> +#define RK3066_PCTL_TIMING_DEFAULT { \
>>
>> Do you need this? Why not just put these values below and avoid the
>> indirection?
>
> Some board may need this in the future as sdram timings are not universal.
> Default timings are dumped from rockchip proprietary loader.
> Look here:
In that case these should go in the device tree like with other Rockchip boards.
[...]
>>
>> How similar is this to rk3288? Could we put common code in a separate
>> file?
>
> Not sure how similar is it to rk3288. CRU, GRF, PMU differ a little between
> socs.
Where did you get the code from? I want to avoid duplicate code and
factor out the differences if we can.
> Also i needed to add few adjustments to make it build and run with tpl.
I am still hoping we can drop TPL.
Regards,
Simon
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