Hi Simon,
W dniu 06.06.2017 o 23:10, Simon Glass pisze:
Hi Pawel,
On 6 June 2017 at 12:53, Paweł Jarosz <paweljarosz3...@gmail.com> wrote:
Rockchip bootrom first reads 1KB data from nand at offset 0x10080C00 and
executes it. Then waits for back to bootrom and loads another 32KB to sram
which also executes. Sdram initialisation code needs to be in one of these two
steps. Then bootloader loads another ~200KB of data at offset 0x60000000
and jumps to it.
32KB of data is a little low for tpl + spl part and ~200KB data is to low for
u-boot part(for example to boot from mmc you need to disable usb support.
My solution to size problem is to move sdram initialisation code to tpl stage,
move spl part to third stage(reading 200KB data) and add support for loading
u-boot by spl from ext2/4, fat partitions.
But moving sdram initialisation code to tpl increases size of tpl above 1KB
(first boot stage). Solution to this is to add code which will be below 1KB
offset in tpl binary and do back to bootrom at very beginning of the tpl
execution.
So do you mean that TPL starts and then loads more of itself? Why not
put SDRAM init in SPL? You say above that 32KB is 'too low', but It's
not clear why.
Ad.1 No. Tpl starts and at the first execution returns to bootrom.
Bootrom then loads
rest of the tpl (31KB) and executes it for a second time.
Ad.2,3 Due to size issues (200KB limit) i needed to move main u-boot to
mmc. To load u-boot from
mmc by SPL (there is 32KB bootrom limit, not enough space for mmc
support) i moved SPL to sdram.
Code executed in sdram can't mess with sdram settings because it will
hang the board. Sdram setup
needs to be done by code in SRAM (tpl).
Adding this few lines of code here meets these conditions.
Signed-off-by: Paweł Jarosz <paweljarosz3...@gmail.com>
---
arch/arm/cpu/armv7/start.S | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index f06fd28..73e03d9 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -36,6 +36,19 @@
#endif
reset:
+
+#if defined(CONFIG_ROCKCHIP_RK3066) && defined(CONFIG_TPL_BUILD)
+ ldr r3, =0x10080900
+ ldr r0, [r3]
+ cmp r0, #1
+ movne r0, #1
+ strne r0, [r3]
+ beq out_of_bootrom
+ bx lr
+out_of_bootrom:
+ mov r0, #0
+ str r0, [r3]
+#endif
/* Allow the board to save important registers */
b save_boot_params
save_boot_params_ret:
--
2.7.4
Regards,
Simon
Regards,
Paweł
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