On Rab, 2017-05-10 at 16:28 +0800, Chee, Tien Fong wrote: > >
> On Sel, 2017-05-09 at 09:58 +0200, Marek Vasut wrote: > > > > On 05/09/2017 07:02 AM, Chee, Tien Fong wrote: > > > > > > > > > On Isn, 2017-05-08 at 11:57 +0200, Marek Vasut wrote: > > > > > > > > > > > > On 05/08/2017 05:02 AM, Chee, Tien Fong wrote: > > > > > > > > > > > > > > > > > > > > On Jum, 2017-05-05 at 13:11 +0200, Marek Vasut wrote: > > > > > > > > > > > > > > > > > > > > > > > > On 05/05/2017 12:26 PM, tien.fong.c...@intel.com wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > From: Tien Fong Chee <tien.fong.c...@intel.com> > > > > > > > > > > > > > > Convert Macro #define configuration to Kconfig method. > > > > > > > All > > > > > > > FPGA > > > > > > > devices > > > > > > > enable configuration based on CONFIG_FPGA_ALTERA. > > > > > > > > > > > > > > Signed-off-by: Tien Fong Chee <tien.fong.c...@intel.com> > > > > > > > --- > > > > > > > drivers/fpga/Kconfig | 5 ++++- > > > > > > > drivers/fpga/Makefile | 3 +-- > > > > > > > include/altera.h | 2 +- > > > > > > > include/configs/socfpga_common.h | 3 --- > > > > > > > 4 files changed, 6 insertions(+), 7 deletions(-) > > > > > > > > > > > > > > diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig > > > > > > > index a760944..fc4ea0d 100644 > > > > > > > --- a/drivers/fpga/Kconfig > > > > > > > +++ b/drivers/fpga/Kconfig > > > > > > > @@ -2,12 +2,15 @@ menu "FPGA support" > > > > > > > > > > > > > > config FPGA > > > > > > > bool > > > > > > > + help > > > > > > > + Enable FPGA driver build. > > > > > > Separate patch please , also this is not driver, but > > > > > > framework . > > > > > > There's > > > > > > not just drivers here IMO. > > > > > > > > > > > ohh...okay, so you prefer i revert the changes, or better > > > > > explanation > > > > > in separate patch? if for later,what is your suggestion? > > > > > Thanks. > > > > Turning this whole FPGA subsystem into Kconfig should be a > > > > separat > > > > patch. There's a script for that too and you need to convert > > > > and > > > > build > > > > test all the boards which define CONFIG_FPGA . > > > > > > > Okay, this patch is specific for turning whole FPGA sybsytem into > > > Kconfig. I will use moveconfig.py for this. thanks. > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > config FPGA_ALTERA > > > > > > > bool "Enable Altera FPGA drivers" > > > > > > > + default y if TARGET_SOCFPGA_GEN5 && CMD_FPGA > > > > > > Should be selected by arch code, drop this. > > > > > > > > > > > just for clarity, are you means defconfig == "selected by > > > > > arch > > > > > code"? > > > > I mean arch/arm/mach-socfpga/Kconfig > > > > > > > With moveconfig.py, i think this change is not required. > > So, who will enable FPGA_ALTERA ? > > > Below boards will enable the FPGA_ALTERA, their header file include > socfpga_common.h, and CONFIG_CMD_FPGA set to y by default. i believe > moveconfig.py will set this FPGA_ALTERA into their defconfig > respectively. > config TARGET_SOCFPGA_ARRIA10_SOCDK > bool "Altera SOCFPGA SoCDK (Arria 10)" > select TARGET_SOCFPGA_ARRIA10 > > config TARGET_SOCFPGA_ARRIA5_SOCDK > bool "Altera SOCFPGA SoCDK (Arria V)" > select TARGET_SOCFPGA_ARRIA5 > > config TARGET_SOCFPGA_CYCLONE5_SOCDK > bool "Altera SOCFPGA SoCDK (Cyclone V)" > select TARGET_SOCFPGA_CYCLONE5 > > config TARGET_SOCFPGA_ARIES_MCVEVK > bool "Aries MCVEVK (Cyclone V)" > select TARGET_SOCFPGA_CYCLONE5 > > config TARGET_SOCFPGA_EBV_SOCRATES > bool "EBV SoCrates (Cyclone V)" > select TARGET_SOCFPGA_CYCLONE5 > > config TARGET_SOCFPGA_IS1 > bool "IS1 (Cyclone V)" > select TARGET_SOCFPGA_CYCLONE5 > > config TARGET_SOCFPGA_SAMTEC_VINING_FPGA > bool "samtec VIN|ING FPGA (Cyclone V)" > select BOARD_LATE_INIT > select TARGET_SOCFPGA_CYCLONE5 > > config TARGET_SOCFPGA_SR1500 > bool "SR1500 (Cyclone V)" > select TARGET_SOCFPGA_CYCLONE5 > > config TARGET_SOCFPGA_TERASIC_DE0_NANO > bool "Terasic DE0-Nano-Atlas (Cyclone V)" > select TARGET_SOCFPGA_CYCLONE5 > > config TARGET_SOCFPGA_TERASIC_DE10_NANO > bool "Terasic DE10-Nano (Cyclone V)" > select TARGET_SOCFPGA_CYCLONE5 > > config TARGET_SOCFPGA_TERASIC_DE1_SOC > bool "Terasic DE1-SoC (Cyclone V)" > select TARGET_SOCFPGA_CYCLONE5 > > config TARGET_SOCFPGA_TERASIC_SOCKIT > bool "Terasic SoCkit (Cyclone V)" > select TARGET_SOCFPGA_CYCLONE5 convert to Kconfig take time to run, more than 1k++ defconfg need to be processed, so i plan to take out from this patch set and submiting separately after this patchset. It sounds okay for you, marek :)? > > [...] _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
