Am 19.04.2017 um 15:42 schrieb Philipp Tomsich:
> This originally started out as
>      "pinctrl: Kconfig: reorder to keep Rockchip options together"
> and tried to keep the Rockchip-related config options together.
> 
> However, we now rewrite all chip-specific driver options to start
> with CONFIG_PINCTRL_ (with the inadvertent changes to related
> Makefiles) and sort those alphabetically. And as this already means
> touching most of the file, we also reformat the help text to not exceed
> 80 characters (but make full use of those 80 characters).
> 
> Signed-off-by: Philipp Tomsich <philipp.toms...@theobroma-systems.com>
> ---
> 
> Changes in v2:
> - sort options alphabetically and use a common naming (i.e. always
>   start with CONFIG_PINCTRL_) for chip-specific drivers
> 
>  drivers/pinctrl/Kconfig        | 154 
> ++++++++++++++++++++++-------------------
>  drivers/pinctrl/Makefile       |   2 +-
>  drivers/pinctrl/ath79/Makefile |   4 +-
>  3 files changed, 86 insertions(+), 74 deletions(-)
> 
> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
> index 355aeae..2acd6f6 100644
> --- a/drivers/pinctrl/Kconfig
> +++ b/drivers/pinctrl/Kconfig
> @@ -105,7 +105,7 @@ config SPL_PINCONF
>  
>  if PINCTRL || SPL_PINCTRL
>  
> -config AR933X_PINCTRL
> +config PINCTRL_AR933X
>       bool "QCA/Athores ar933x pin control driver"
>       depends on DM && SOC_AR933X
>       help
> @@ -114,98 +114,118 @@ config AR933X_PINCTRL
>         both the GPIO definitions and pin control functions for each
>         available multiplex function.
>  

if you rename Kconfig symbols, you also have to adapt the defconfig
files. E.g.

$ git grep -n AR933X_PINCTRL -- configs/
configs/ap121_defconfig:43:CONFIG_AR933X_PINCTRL=y

> -config QCA953X_PINCTRL
> +config PINCTRL_AT91
> +     bool "AT91 pinctrl driver"
> +     depends on DM
> +     help
> +       This option is to enable the AT91 pinctrl driver for AT91 PIO
> +       controller.
> +
> +       AT91 PIO controller is a combined gpio-controller, pin-mux and
> +       pin-config module. Each I/O pin may be dedicated as a general-purpose
> +       I/O or be assigned to a function of an embedded peripheral. Each I/O
> +       pin has a glitch filter providing rejection of glitches lower than
> +       one-half of peripheral clock cycle and a debouncing filter providing
> +       rejection of unwanted pulses from key or push button operations. You
> +       can also control the multi-driver capability, pull-up and pull-down
> +       feature on each I/O pin.
> +
> +config PINCTRL_AT91PIO4
> +     bool "AT91 PIO4 pinctrl driver"
> +     depends on DM
> +     help
> +       This option is to enable the AT91 pinctrl driver for AT91 PIO4
> +       controller which is available on SAMA5D2 SoC.
> +
> +config PINCTRL_PIC32
> +     bool "Microchip PIC32 pin-control and pin-mux driver"
> +     depends on DM && MACH_PIC32
> +     default y
> +     help
> +       Supports individual pin selection and configuration for each
> +       remappable peripheral available on Microchip PIC32
> +       SoCs. This driver is controlled by a device tree node which
> +       contains both GPIO defintion and pin control functions.
> +
> +config PINCTRL_QCA953X
>       bool "QCA/Athores qca953x pin control driver"
>       depends on DM && SOC_QCA953X
>       help
>         Support pin multiplexing control on QCA/Athores qca953x SoCs.
> -       The driver is controlled by a device tree node which contains
> -       both the GPIO definitions and pin control functions for each
> -       available multiplex function.
> +
> +       The driver is controlled by a device tree node which contains both
> +       the GPIO definitions and pin control functions for each available
> +       multiplex function.
>  
>  config ROCKCHIP_RK3036_PINCTRL
>       bool "Rockchip rk3036 pin control driver"
>       depends on DM
>       help
> -       Support pin multiplexing control on Rockchip rk3036 SoCs. The driver 
> is
> -       controlled by a device tree node which contains both the GPIO
> -       definitions and pin control functions for each available multiplex
> -       function.
> +       Support pin multiplexing control on Rockchip rk3036 SoCs.
> +
> +       The driver is controlled by a device tree node which contains both
> +       the GPIO definitions and pin control functions for each available
> +       multiplex function.
>  
>  config ROCKCHIP_RK3188_PINCTRL
>       bool "Rockchip rk3188 pin control driver"
>       depends on DM
>       help
> -       Support pin multiplexing control on Rockchip rk3188 SoCs. The driver
> -       is controlled by a device tree node which contains both the GPIO
> -       definitions and pin control functions for each available multiplex
> -       function.
> +       Support pin multiplexing control on Rockchip rk3188 SoCs.
> +
> +       The driver is controlled by a device tree node which contains both
> +       the GPIO definitions and pin control functions for each available
> +       multiplex function.
>  
>  config ROCKCHIP_RK3288_PINCTRL
>       bool "Rockchip rk3288 pin control driver"
>       depends on DM
>       help
> -       Support pin multiplexing control on Rockchip rk3288 SoCs. The driver
> -       is controlled by a device tree node which contains both the GPIO
> -       definitions and pin control functions for each available multiplex
> -       function.
> -
> -config PINCTRL_AT91
> -     bool "AT91 pinctrl driver"
> -     depends on DM
> -     help
> -       This option is to enable the AT91 pinctrl driver for AT91 PIO
> -       controller. AT91 PIO controller is a combined gpio-controller,
> -       pin-mux and pin-config module. Each I/O pin may be dedicated as
> -       a general-purpose I/O or be assigned to a function of an embedded
> -       peripheral. Each I/O pin has a glitch filter providing rejection of
> -       glitches lower than one-half of peripheral clock cycle and
> -       a debouncing filter providing rejection of unwanted pulses from key
> -       or push button operations. You can also control the multi-driver
> -       capability, pull-up and pull-down feature on each I/O pin.
> +       Support pin multiplexing control on Rockchip rk3288 SoCs.
>  
> -config PINCTRL_AT91PIO4
> -     bool "AT91 PIO4 pinctrl driver"
> -     depends on DM
> -     help
> -       This option is to enable the AT91 pinctrl driver for AT91 PIO4
> -       controller which is available on SAMA5D2 SoC.
> +       The driver is controlled by a device tree node which contains both
> +       the GPIO definitions and pin control functions for each available
> +       multiplex function.
>  
>  config ROCKCHIP_RK3328_PINCTRL
>       bool "Rockchip rk3328 pin control driver"
>       depends on DM
>       help
> -       Support pin multiplexing control on Rockchip rk3328 SoCs. The driver
> -       is controlled by a device tree node which contains both the GPIO
> -       definitions and pin control functions for each available multiplex
> -       function.
> +       Support pin multiplexing control on Rockchip rk3328 SoCs.
> +
> +       The driver is controlled by a device tree node which contains both
> +       the GPIO definitions and pin control functions for each available
> +       multiplex function.
>  
>  config ROCKCHIP_RK3399_PINCTRL
>       bool "Rockchip rk3399 pin control driver"
>       depends on DM
>       help
> -       Support pin multiplexing control on Rockchip rk3399 SoCs. The driver
> -       is controlled by a device tree node which contains both the GPIO
> -       definitions and pin control functions for each available multiplex
> -       function.
> +       Support pin multiplexing control on Rockchip rk3399 SoCs.
> +
> +       The driver is controlled by a device tree node which contains both
> +       the GPIO definitions and pin control functions for each available
> +       multiplex function.
>  
>  config PINCTRL_SANDBOX
>       bool "Sandbox pinctrl driver"
>       depends on SANDBOX
>       help
> -       This enables pinctrl driver for sandbox.  Currently, this driver
> -       actually does nothing but print debug messages when pinctrl
> -       operations are invoked.
> +       This enables pinctrl driver for sandbox.
>  
> -config PIC32_PINCTRL
> -     bool "Microchip PIC32 pin-control and pin-mux driver"
> -     depends on DM && MACH_PIC32
> -     default y
> +       Currently, this driver actually does nothing but print debug
> +       messages when pinctrl operations are invoked.
> +
> +config PINCTRL_SINGLE
> +     bool "Single register pin-control and pin-multiplex driver"
> +     depends on DM
>       help
> -       Supports individual pin selection and configuration for each 
> remappable
> -       peripheral available on Microchip PIC32 SoCs. This driver is 
> controlled
> -       by a device tree node which contains both GPIO defintion and pin 
> control
> -       functions.
> +       This enables pinctrl driver for systems using a single register for
> +       pin configuration and multiplexing. TI's AM335X SoCs are examples of
> +       such systems.
> +
> +       Depending on the platform make sure to also enable OF_TRANSLATE and
> +       eventually SPL_OF_TRANSLATE to get correct address translations.
>  
>  config PINCTRL_STI
>       bool "STMicroelectronics STi pin-control and pin-mux driver"
> @@ -213,28 +233,20 @@ config PINCTRL_STI
>       default y
>       help
>         Support pin multiplexing control on STMicrolectronics STi SoCs.
> +
>         The driver is controlled by a device tree node which contains both
> -       the GPIO definitions and pin control functions for each available 
> multiplex
> -       function.
> +       the GPIO definitions and pin control functions for each available
> +       multiplex function.
>  
>  config PINCTRL_STM32
>       bool "ST STM32 pin control driver"
>       depends on DM
>       help
> -       Supports pin multiplexing control on stm32 SoCs. The driver is
> -       controlled by a device tree node which contains both the GPIO
> -       definitions and pin control functions for each available multiplex
> -       function.
> +       Supports pin multiplexing control on stm32 SoCs.
>  
> -config PINCTRL_SINGLE
> -     bool "Single register pin-control and pin-multiplex driver"
> -     depends on DM
> -     help
> -       This enables pinctrl driver for systems using a single register for
> -       pin configuration and multiplexing. TI's AM335X SoCs are examples of
> -       such systems.
> -       Depending on the platform make sure to also enable OF_TRANSLATE and
> -       eventually SPL_OF_TRANSLATE to get correct address translations.
> +       The driver is controlled by a device tree node which contains both
> +       the GPIO definitions and pin control functions for each available
> +       multiplex function.
>  
>  endif
>  
> diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
> index bbb2480..17a7173 100644
> --- a/drivers/pinctrl/Makefile
> +++ b/drivers/pinctrl/Makefile
> @@ -13,7 +13,7 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
>  obj-$(CONFIG_PINCTRL_SANDBOX)        += pinctrl-sandbox.o
>  
>  obj-$(CONFIG_PINCTRL_UNIPHIER)       += uniphier/
> -obj-$(CONFIG_PIC32_PINCTRL)  += pinctrl_pic32.o
> +obj-$(CONFIG_PINCTRL_PIC32)  += pinctrl_pic32.o
>  obj-$(CONFIG_PINCTRL_EXYNOS) += exynos/
>  obj-$(CONFIG_PINCTRL_MESON)  += meson/
>  obj-$(CONFIG_PINCTRL_MVEBU)  += mvebu/
> diff --git a/drivers/pinctrl/ath79/Makefile b/drivers/pinctrl/ath79/Makefile
> index dcea10a..c87a9aa 100644
> --- a/drivers/pinctrl/ath79/Makefile
> +++ b/drivers/pinctrl/ath79/Makefile
> @@ -2,5 +2,5 @@
>  # SPDX-License-Identifier:   GPL-2.0+
>  #
>  
> -obj-$(CONFIG_AR933X_PINCTRL) += pinctrl_ar933x.o
> -obj-$(CONFIG_QCA953x_PINCTRL) += pinctrl_qca953x.o
> +obj-$(CONFIG_PINCTRL_AR933X) += pinctrl_ar933x.o
> +obj-$(CONFIG_PINCTRL_QCA953x) += pinctrl_qca953x.o
> 

-- 
- Daniel

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