Am 13.04.2017 um 17:52 schrieb Álvaro Fernández Rojas:
> BCM6358 has its internal registers mapped to 0xfffe0000, which is changed to
> 0x1ffe0000 when ioremap is called.
>
> Signed-off-by: Álvaro Fernández Rojas <nolt...@gmail.com>
> ---
> arch/mips/include/asm/mach-generic/ioremap.h | 15 ++++++++++++++-
> 1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/arch/mips/include/asm/mach-generic/ioremap.h
> b/arch/mips/include/asm/mach-generic/ioremap.h
> index 6b191d5..b6a920d 100644
> --- a/arch/mips/include/asm/mach-generic/ioremap.h
> +++ b/arch/mips/include/asm/mach-generic/ioremap.h
> @@ -16,15 +16,28 @@ static inline phys_addr_t fixup_bigphys_addr(phys_addr_t
> phys_addr,
> return phys_addr;
> }
>
> +static inline int is_mips_internal_registers(phys_addr_t offset)
> +{
> +#ifdef CONFIG_SOC_BMIPS_BCM6358
> + if (offset >= 0xfffe0000)
> + return 1;
> +#endif
> +
> + return 0;
> +}
> +
> static inline void __iomem *plat_ioremap(phys_addr_t offset, unsigned long
> size,
> unsigned long flags)
> {
> + if (is_mips_internal_registers(offset))
> + return (void __iomem *)offset;
> +
> return NULL;
> }
>
> static inline int plat_iounmap(const volatile void __iomem *addr)
> {
> - return 0;
> + return is_mips_internal_registers((unsigned long)addr);
> }
>
> #define _page_cachable_default _CACHE_CACHABLE_NONCOHERENT
> please create a separate ioremap.h in arch/mips/include/asm/mach-bmips/ with the BMIPS specific code. Then this file will be automatically used instead of the generic version. This is working like in Linux kernel. -- - Daniel
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