Set the same PHY parameters as the Boot ROM uses.
Signed-off-by: Masahiro Yamada <yamada.masah...@socionext.com>
---
arch/arm/mach-uniphier/clk/clk-ld11.c | 9 +++++++++
arch/arm/mach-uniphier/sg-regs.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/arch/arm/mach-uniphier/clk/clk-ld11.c
b/arch/arm/mach-uniphier/clk/clk-ld11.c
index a4dcde7..36aa787 100644
--- a/arch/arm/mach-uniphier/clk/clk-ld11.c
+++ b/arch/arm/mach-uniphier/clk/clk-ld11.c
@@ -37,9 +37,18 @@ void uniphier_ld11_clk_init(void)
{
/* FIXME: the current clk driver can not handle parents */
u32 tmp;
+ int ch;
+
tmp = readl(SC_CLKCTRL4);
tmp |= SC_CLKCTRL4_MIO | SC_CLKCTRL4_STDMAC;
writel(tmp, SC_CLKCTRL4);
+
+ for (ch = 0; ch < 3; ch++) {
+ void __iomem *phyctrl = (void __iomem *)SG_USBPHYCTRL;
+
+ writel(0x82280600, phyctrl + 8 * ch);
+ writel(0x00000106, phyctrl + 8 * ch + 4);
+ }
}
#endif
}
diff --git a/arch/arm/mach-uniphier/sg-regs.h b/arch/arm/mach-uniphier/sg-regs.h
index 4d7e6f7..dc94084 100644
--- a/arch/arm/mach-uniphier/sg-regs.h
+++ b/arch/arm/mach-uniphier/sg-regs.h
@@ -55,6 +55,7 @@
#define SG_MEMCONF_SPARSEMEM (0x1 << 4)
+#define SG_USBPHYCTRL (SG_CTRL_BASE | 0x500)
#define SG_ETPHYPSHUT (SG_CTRL_BASE | 0x554)
#define SG_ETPHYCNT (SG_CTRL_BASE | 0x550)
--
2.7.4
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