On 10/04/2017 13:44, Peng Fan wrote:
> The MIB RAM and FIFO receive start register does not exist on
> i.MX6ULL. Accessing these register will cause enet not work well or
> cause system report fault.
>
> Signed-off-by: Peng Fan <peng....@nxp.com>
> Cc: Joe Hershberger <joe.hershber...@ni.com>
> ---
> drivers/net/fec_mxc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
> index 910879b..ac7afb5 100644
> --- a/drivers/net/fec_mxc.c
> +++ b/drivers/net/fec_mxc.c
> @@ -563,7 +563,7 @@ static int fec_init(struct eth_device *dev, bd_t *bd)
> writel(0x00000000, &fec->eth->gaddr2);
>
> /* Do not access reserved register for i.MX6UL */
> - if (!is_mx6ul()) {
> + if (!is_mx6ul() && !is_mx6ull()) {
> /* clear MIB RAM */
> for (i = mib_ptr; i <= mib_ptr + 0xfc; i += 4)
> writel(0, i);
>
Reviewed-by : Stefano Babic <sba...@denx.de>
Joe, I see Tom has assigned the series to me. If it is ok for you, I
will merge the series into u-boot-imx.
Regards,
Stefano
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