The number of pins to be configured could be more than 50 e.g. in case
of sdram controller, there are about 56 pins (32 data lines, 12 address
& some control signals).
Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
cc: Christophe KERELLO <christophe.kere...@st.com>
---
Changed in v4: None
Changed in v3: None
Changed in v2: None
drivers/pinctrl/pinctrl_stm32.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index 01f0429..d7b5ea3 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -7,6 +7,7 @@
DECLARE_GLOBAL_DATA_PTR;
+#define MAX_PINS_ONE_IP 70
#define MODE_BITS_MASK 3
#define OSPEED_MASK 3
#define PUPD_MASK 3
@@ -95,7 +96,7 @@ static int prep_gpio_ctl(struct stm32_gpio_ctl *gpio_ctl, u32
gpio_fn, int node)
static int stm32_pinctrl_set_state_simple(struct udevice *dev,
struct udevice *periph)
{
- u32 pin_mux[50];
+ u32 pin_mux[MAX_PINS_ONE_IP];
struct fdtdec_phandle_args args;
int rv, len;
--
1.9.1
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