On 03/28/2017 01:51 PM, Ken Lin wrote: > Apply the proper setting for the reserved bits in SetDes Test and System Mode > Control register > to avoid the voltage peak issue while we do the IEEE PHY comformance test > > Signed-off-by: Ken Lin <yungching0...@gmail.com> > ---
Acked-by: Akshay Bhat <akshay.b...@timesys.com> _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
