On 13/03/2017 16:51, Tim Harvey wrote:
> Signed-off-by: Tim Harvey <thar...@gateworks.com>
> ---
>  board/gateworks/gw_ventana/common.c         | 103 
> ++++++++++++++++++++++++++++
>  board/gateworks/gw_ventana/eeprom.c         |   2 +
>  board/gateworks/gw_ventana/gw_ventana.c     |  13 ++++
>  board/gateworks/gw_ventana/gw_ventana_spl.c |  42 ++++++++++--
>  board/gateworks/gw_ventana/ventana_eeprom.h |   1 +
>  5 files changed, 157 insertions(+), 4 deletions(-)
> 
> diff --git a/board/gateworks/gw_ventana/common.c 
> b/board/gateworks/gw_ventana/common.c
> index 69dc8fc..188f7f5 100644
> --- a/board/gateworks/gw_ventana/common.c
> +++ b/board/gateworks/gw_ventana/common.c
> @@ -51,6 +51,17 @@ static iomux_v3_cfg_t const gw5904_emmc_pads[] = {
>       IOMUX_PADS(PAD_SD3_CMD__SD3_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
>       IOMUX_PADS(PAD_SD3_RST__SD3_RESET  | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
>  };
> +/* 4-bit microSD on SD2 */
> +static iomux_v3_cfg_t const gw5904_mmc_pads[] = {
> +     IOMUX_PADS(PAD_SD2_CLK__SD2_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +     IOMUX_PADS(PAD_SD2_CMD__SD2_CMD    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +     IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +     IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +     IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +     IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +     /* CD */
> +     IOMUX_PADS(PAD_NANDF_CS0__GPIO6_IO11 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> +};
>  /* 8-bit eMMC on SD2/NAND */
>  static iomux_v3_cfg_t const gw560x_emmc_sd2_pads[] = {
>       IOMUX_PADS(PAD_SD2_CLK__SD2_CLK    | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
> @@ -412,6 +423,39 @@ static iomux_v3_cfg_t const gw560x_gpio_pads[] = {
>       IOMUX_PADS(PAD_DISP0_DAT5__GPIO4_IO26 | DIO_PAD_CFG),
>  };
>  
> +static iomux_v3_cfg_t const gw5903_gpio_pads[] = {
> +     /* BKLT_12VEN */
> +     IOMUX_PADS(PAD_GPIO_7__GPIO1_IO07 | DIO_PAD_CFG),
> +     /* EMMY_PDN# */
> +     IOMUX_PADS(PAD_NANDF_D2__GPIO2_IO02 | DIO_PAD_CFG),
> +     /* EMMY_CFG1# */
> +     IOMUX_PADS(PAD_NANDF_D3__GPIO2_IO03 | DIO_PAD_CFG),
> +     /* EMMY_CFG1# */
> +     IOMUX_PADS(PAD_NANDF_D4__GPIO2_IO04 | DIO_PAD_CFG),
> +     /* USBH1_PEN (EHCI) */
> +     IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | DIO_PAD_CFG),
> +     /* USBH2_PEN (OTG) */
> +     IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG),
> +     /* USBDPC_PEN */
> +     IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG),
> +     /* TOUCH_RST */
> +     IOMUX_PADS(PAD_KEY_COL1__GPIO4_IO08 | DIO_PAD_CFG),
> +     /* AUDIO_RST# */
> +     IOMUX_PADS(PAD_DISP0_DAT23__GPIO5_IO17 | DIO_PAD_CFG),
> +     /* UART1_TEN# */
> +     IOMUX_PADS(PAD_CSI0_DAT12__GPIO5_IO30 | DIO_PAD_CFG),
> +     /* MX6_LOCLED# */
> +     IOMUX_PADS(PAD_NANDF_CS1__GPIO6_IO14 | DIO_PAD_CFG),
> +     /* LVDS_BKLEN # */
> +     IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG),
> +     /* RGMII_PDWN# */
> +     IOMUX_PADS(PAD_ENET_CRS_DV__GPIO1_IO25 | DIO_PAD_CFG),
> +     /* TOUCH_IRQ# */
> +     IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG),
> +     /* TOUCH_RST# */
> +     IOMUX_PADS(PAD_KEY_COL1__GPIO4_IO08 | DIO_PAD_CFG),
> +};
> +
>  static iomux_v3_cfg_t const gw5904_gpio_pads[] = {
>       /* USB_HUBRST# */
>       IOMUX_PADS(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG),
> @@ -688,6 +732,9 @@ struct dio_cfg gw560x_dio[] = {
>       },
>  };
>  
> +struct dio_cfg gw5903_dio[] = {
> +};
> +
>  struct dio_cfg gw5904_dio[] = {
>       {
>               { IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) },
> @@ -951,6 +998,19 @@ struct ventana gpio_cfg[GW_UNKNOWN] = {
>               .mmc_cd = IMX_GPIO_NR(7, 0),
>       },
>  
> +     /* GW5903 */
> +     {
> +             .gpio_pads = gw5903_gpio_pads,
> +             .num_pads = ARRAY_SIZE(gw5903_gpio_pads)/2,
> +             .dio_cfg = gw5903_dio,
> +             .dio_num = ARRAY_SIZE(gw5903_dio),
> +             .leds = {
> +                     IMX_GPIO_NR(6, 14),
> +             },
> +             .otgpwr_en = IMX_GPIO_NR(4, 15),
> +             .mmc_cd = IMX_GPIO_NR(6, 11),
> +     },
> +
>       /* GW5904 */
>       {
>               .gpio_pads = gw5904_gpio_pads,
> @@ -1081,6 +1141,22 @@ void setup_iomux_gpio(int board, struct 
> ventana_board_info *info)
>               gpio_request(IMX_GPIO_NR(4, 26), "12p0_en");
>               gpio_direction_output(IMX_GPIO_NR(4, 26), 1);
>               break;
> +     case GW5903:
> +             gpio_request(IMX_GPIO_NR(3, 31) , "usbh1-ehci_pwr");
> +             gpio_direction_output(IMX_GPIO_NR(3, 31), 1);
> +             gpio_request(IMX_GPIO_NR(4, 15) , "usbh2-otg_pwr");
> +             gpio_direction_output(IMX_GPIO_NR(4, 15), 1);
> +             gpio_request(IMX_GPIO_NR(4, 7) , "usbdpc_pwr");
> +             gpio_direction_output(IMX_GPIO_NR(4, 15), 1);
> +             gpio_request(IMX_GPIO_NR(1, 25) , "rgmii_en");
> +             gpio_direction_output(IMX_GPIO_NR(1, 25), 1);
> +             gpio_request(IMX_GPIO_NR(4, 6) , "touch_irq#");
> +             gpio_direction_input(IMX_GPIO_NR(4, 6));
> +             gpio_request(IMX_GPIO_NR(4, 8) , "touch_rst");
> +             gpio_direction_output(IMX_GPIO_NR(4, 8), 1);
> +             gpio_request(IMX_GPIO_NR(1, 7) , "bklt_12ven");
> +             gpio_direction_output(IMX_GPIO_NR(1, 7), 1);
> +             break;
>       case GW5904:
>               gpio_request(IMX_GPIO_NR(5, 11), "skt1_wdis#");
>               gpio_direction_output(IMX_GPIO_NR(5, 11), 1);
> @@ -1242,6 +1318,13 @@ void setup_pmic(void)
>                       /* set SW3 (VDD_ARM) */
>                       pmic_reg_write(p, LTC3676_DVB3A, 0x1f);
>                       break;
> +             case GW5903:
> +                     /* mask PGOOD during SW4 transition */
> +                     pmic_reg_write(p, LTC3676_DVB4B,
> +                                    0x1f | LTC3676_PGOOD_MASK);
> +                     /* set SW4 (VDD_SOC) */
> +                     pmic_reg_write(p, LTC3676_DVB4A, 0x1f);
> +                     break;
>               default:
>                       /* mask PGOOD during SW1 transition */
>                       pmic_reg_write(p, LTC3676_DVB1B,
> @@ -1296,6 +1379,25 @@ int board_mmc_init(bd_t *bis)
>               if (ret)
>                       printf("failed registering microSD usdhc2\n");
>               return 0;
> +     /* GW5903 has 0:SD3 (emmc) and 0:SD2 (microSD) */
> +     case GW5903:
> +             /* usdhc3: 8-bit eMMC */
> +             SETUP_IOMUX_PADS(gw5904_emmc_pads);
> +             usdhc_cfg[0].esdhc_base = USDHC3_BASE_ADDR;
> +             usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
> +             usdhc_cfg[0].max_bus_width = 8;
> +             ret = fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
> +             if (ret)
> +                     printf("failed registering emmc usdhc3\n");
> +             /* usdhc2: 4-bit microSD */
> +             SETUP_IOMUX_PADS(gw5904_mmc_pads);
> +             usdhc_cfg[1].esdhc_base = USDHC2_BASE_ADDR;
> +             usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
> +             usdhc_cfg[1].max_bus_width = 4;
> +             ret = fsl_esdhc_initialize(bis, &usdhc_cfg[1]);
> +             if (ret)
> +                     printf("failed registering microSD usdhc2\n");
> +             return 0;
>       case GW5904:
>               /* usdhc3: 8bit eMMC */
>               SETUP_IOMUX_PADS(gw5904_emmc_pads);
> @@ -1326,6 +1428,7 @@ int board_mmc_getcd(struct mmc *mmc)
>               if (cfg->esdhc_base == USDHC2_BASE_ADDR)
>                       return 1;
>               break;
> +     case GW5903:
>       case GW5904:
>               /* emmc is always present */
>               if (cfg->esdhc_base == USDHC3_BASE_ADDR)
> diff --git a/board/gateworks/gw_ventana/eeprom.c 
> b/board/gateworks/gw_ventana/eeprom.c
> index cfd96b9..2c07a84 100644
> --- a/board/gateworks/gw_ventana/eeprom.c
> +++ b/board/gateworks/gw_ventana/eeprom.c
> @@ -98,6 +98,8 @@ read_eeprom(int bus, struct ventana_board_info *info)
>                       type = GW560x;
>               break;
>       case '9':
> +             if (info->model[4] == '0' && info->model[5] == '3')
> +                     type = GW5903;
>               if (info->model[4] == '0' && info->model[5] == '4')
>                       type = GW5904;
>               break;
> diff --git a/board/gateworks/gw_ventana/gw_ventana.c 
> b/board/gateworks/gw_ventana/gw_ventana.c
> index 5f25d8d..dc8cd88 100644
> --- a/board/gateworks/gw_ventana/gw_ventana.c
> +++ b/board/gateworks/gw_ventana/gw_ventana.c
> @@ -227,6 +227,18 @@ int board_phy_config(struct phy_device *phydev)
>               phy_write(phydev, MDIO_DEVAD_NONE, 22, 0);
>       }
>  
> +     /* TI DP83867 */
> +     else if (phydev->phy_id == 0x2000a231) {
> +             /* configure register 0x170 for ref CLKOUT */
> +             phy_write(phydev, MDIO_DEVAD_NONE, 13, 0x001f);
> +             phy_write(phydev, MDIO_DEVAD_NONE, 14, 0x0170);
> +             phy_write(phydev, MDIO_DEVAD_NONE, 13, 0x401f);
> +             val = phy_read(phydev, MDIO_DEVAD_NONE, 14);
> +             val &= ~0x1f00;
> +             val |= 0x0b00; /* chD tx clock*/
> +             phy_write(phydev, MDIO_DEVAD_NONE, 14, val);
> +     }
> +
>       if (phydev->drv->config)
>               phydev->drv->config(phydev);
>  
> @@ -695,6 +707,7 @@ static const struct boot_mode board_boot_modes[] = {
>       /* NAND: 64pages per block, 3 row addr cycles, 2 copies of FCB/DBBT */
>       { "nand", MAKE_CFGVAL(0x80, 0x02, 0x00, 0x00) },
>       { "emmc2", MAKE_CFGVAL(0x60, 0x48, 0x00, 0x00) }, /* GW5600 */
> +     { "emmc3", MAKE_CFGVAL(0x60, 0x50, 0x00, 0x00) }, /* GW5903/GW5904 */
>       { NULL, 0 },
>  };
>  #endif
> diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c 
> b/board/gateworks/gw_ventana/gw_ventana_spl.c
> index 136b5fc..6060b44 100644
> --- a/board/gateworks/gw_ventana/gw_ventana_spl.c
> +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
> @@ -374,6 +374,25 @@ static struct mx6_mmdc_calibration 
> mx6sdl_256x64_mmdc_calib = {
>       .p1_mpwrdlctl = 0x383A3930,
>  };
>  
> +static struct mx6_mmdc_calibration mx6sdl_256x64x2_mmdc_calib = {
> +     /* write leveling calibration determine */
> +     .p0_mpwldectrl0 = 0x001F003F,
> +     .p0_mpwldectrl1 = 0x001F001F,
> +     .p1_mpwldectrl0 = 0x001F004E,
> +     .p1_mpwldectrl1 = 0x0059001F,
> +     /* Read DQS Gating calibration */
> +     .p0_mpdgctrl0   = 0x42220225,
> +     .p0_mpdgctrl1   = 0x0213021F,
> +     .p1_mpdgctrl0   = 0x022C0242,
> +     .p1_mpdgctrl1   = 0x022C0244,
> +     /* Read Calibration: DQS delay relative to DQ read access */
> +     .p0_mprddlctl   = 0x474A4C4A,
> +     .p1_mprddlctl   = 0x48494C45,
> +     /* Write Calibration: DQ/DM delay relative to DQS write access */
> +     .p0_mpwrdlctl   = 0x3F3F3F36,
> +     .p1_mpwrdlctl   = 0x3F36363F,
> +};
> +
>  static struct mx6_mmdc_calibration mx6dq_512x32_mmdc_calib = {
>       /* write leveling calibration determine */
>       .p0_mpwldectrl0 = 0x002A0025,
> @@ -510,10 +529,25 @@ static void spl_dram_init(int width, int size_mb, int 
> board_model)
>                       calib = &mx6sdl_256x64_mmdc_calib;
>               debug("4gB density\n");
>       } else if (width == 64 && size_mb == 4096) {
> -             mem = &mt41k512m16ha_125;
> -             if (is_cpu_type(MXC_CPU_MX6Q))
> -                     calib = &mx6dq_512x64_mmdc_calib;
> -             debug("8gB density\n");
> +             switch(board_model) {
> +             case GW5903:
> +                     /* 8xMT41K256M16 (4GiB) fly-by mirrored 2-chipsels */
> +                     mem = &mt41k256m16ha_125;
> +                     debug("4gB density\n");
> +                     if (!is_cpu_type(MXC_CPU_MX6Q)) {
> +                             calib = &mx6sdl_256x64x2_mmdc_calib;
> +                             sysinfo.ncs = 2;
> +                             sysinfo.cs_density = 18; /* CS0_END=71 */
> +                             sysinfo.cs1_mirror = 1; /* mirror enabled */
> +                     }
> +                     break;
> +             default:
> +                     mem = &mt41k512m16ha_125;
> +                     if (is_cpu_type(MXC_CPU_MX6Q))
> +                             calib = &mx6dq_512x64_mmdc_calib;
> +                     debug("8gB density\n");
> +                     break;
> +             }
>       }
>  
>       if (!(mem && calib)) {
> diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h 
> b/board/gateworks/gw_ventana/ventana_eeprom.h
> index b6daf9b..8a42d67 100644
> --- a/board/gateworks/gw_ventana/ventana_eeprom.h
> +++ b/board/gateworks/gw_ventana/ventana_eeprom.h
> @@ -113,6 +113,7 @@ enum {
>       GW552x,
>       GW553x,
>       GW560x,
> +     GW5903,
>       GW5904,
>       GW_UNKNOWN,
>       GW_BADCRC,
> 
Reviewed-by: Stefano Babic <sba...@denx.de>

Best regards,
Stefano Babic


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