For LD11 and LD20 SoCs, the RST_n pin is asserted by default. If
the EXT_CSD[162], bit[1:0] (RST_n_ENABLE) is fused, the eMMC device
would stay in the reset state until its RST_n pin is deasserted by
software.
Currently, this is cared by an ad-hoc way because the eMMC hardware
reset provider is not supported in U-Boot for now. This code should
be re-written once the "mmc-pwrseq-emmc" binding is supported.
Signed-off-by: Masahiro Yamada <yamada.masah...@socionext.com>
---
arch/arm/mach-uniphier/board_init.c | 1 +
arch/arm/mach-uniphier/clk/Makefile | 2 +-
arch/arm/mach-uniphier/clk/clk-ld11.c | 5 +++++
arch/arm/mach-uniphier/clk/clk-ld20.c | 17 +++++++++++++++++
arch/arm/mach-uniphier/init.h | 1 +
5 files changed, 25 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mach-uniphier/clk/clk-ld20.c
diff --git a/arch/arm/mach-uniphier/board_init.c
b/arch/arm/mach-uniphier/board_init.c
index e89a4c5..2564a02 100644
--- a/arch/arm/mach-uniphier/board_init.c
+++ b/arch/arm/mach-uniphier/board_init.c
@@ -165,6 +165,7 @@ static const struct uniphier_initdata uniphier_initdata[] =
{
.nand_2cs = false,
.sbc_init = uniphier_ld11_sbc_init,
.pll_init = uniphier_ld20_pll_init,
+ .clk_init = uniphier_ld20_clk_init,
.misc_init = uniphier_ld20_misc_init,
},
#endif
diff --git a/arch/arm/mach-uniphier/clk/Makefile
b/arch/arm/mach-uniphier/clk/Makefile
index 43df670..4134197 100644
--- a/arch/arm/mach-uniphier/clk/Makefile
+++ b/arch/arm/mach-uniphier/clk/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-pro5.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD11) += clk-ld11.o pll-ld11.o
-obj-$(CONFIG_ARCH_UNIPHIER_LD20) += pll-ld20.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD20) += clk-ld20.o pll-ld20.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS3) += pll-pxs3.o
endif
diff --git a/arch/arm/mach-uniphier/clk/clk-ld11.c
b/arch/arm/mach-uniphier/clk/clk-ld11.c
index b1e82a1..a4dcde7 100644
--- a/arch/arm/mach-uniphier/clk/clk-ld11.c
+++ b/arch/arm/mach-uniphier/clk/clk-ld11.c
@@ -13,6 +13,8 @@
#include "../sc64-regs.h"
#include "../sg-regs.h"
+#define SDCTRL_EMMC_HW_RESET 0x59810280
+
void uniphier_ld11_clk_init(void)
{
/* if booted from a device other than USB, without stand-by MPU */
@@ -28,6 +30,9 @@ void uniphier_ld11_clk_init(void)
writel(7, SG_ETPHYCNT);
}
+ /* TODO: use "mmc-pwrseq-emmc" */
+ writel(1, SDCTRL_EMMC_HW_RESET);
+
#ifdef CONFIG_USB_EHCI
{
/* FIXME: the current clk driver can not handle parents */
diff --git a/arch/arm/mach-uniphier/clk/clk-ld20.c
b/arch/arm/mach-uniphier/clk/clk-ld20.c
new file mode 100644
index 0000000..5bb560c
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/clk-ld20.c
@@ -0,0 +1,17 @@
+/*
+ * Copyright (C) 2017 Socionext Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <linux/io.h>
+
+#include "../init.h"
+
+#define SDCTRL_EMMC_HW_RESET 0x59810280
+
+void uniphier_ld20_clk_init(void)
+{
+ /* TODO: use "mmc-pwrseq-emmc" */
+ writel(1, SDCTRL_EMMC_HW_RESET);
+}
diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h
index be0ad6c..5c45f2d 100644
--- a/arch/arm/mach-uniphier/init.h
+++ b/arch/arm/mach-uniphier/init.h
@@ -118,6 +118,7 @@ void uniphier_pro4_clk_init(void);
void uniphier_pro5_clk_init(void);
void uniphier_pxs2_clk_init(void);
void uniphier_ld11_clk_init(void);
+void uniphier_ld20_clk_init(void);
unsigned int uniphier_boot_device_raw(void);
int uniphier_pin_init(const char *pinconfig_name);
--
2.7.4
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