From: Suresh Gupta <suresh.gu...@freescale.com>
Rx Compliance tests may fail intermittently at high
jitter frequencies using default register values
Changes identified in test setup makes the Rx compliance test pass
Signed-off-by: Sriram Dash <sriram.d...@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bha...@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gu...@nxp.com>
---
Changes in v2:
Clean up the code after Scott comments,
Previously in v1, we was defining the pointer as u32,
then casting it to u8, and then passing it to
a 16-bit accessor.
arch/arm/cpu/armv7/ls102xa/Kconfig | 4 ++++
arch/arm/cpu/armv7/ls102xa/soc.c | 12 ++++++++++++
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 5 +++++
3 files changed, 21 insertions(+)
diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig
b/arch/arm/cpu/armv7/ls102xa/Kconfig
index a68674f..b7d785e 100644
--- a/arch/arm/cpu/armv7/ls102xa/Kconfig
+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig
@@ -8,6 +8,7 @@ config ARCH_LS1021A
select SYS_FSL_ERRATUM_A009008
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A008997
+ select SYS_FSL_ERRATUM_A009007
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR_BE if SYS_FSL_DDR
@@ -54,6 +55,9 @@ config SYS_FSL_ERRATUM_A009798
config SYS_FSL_ERRATUM_A008997
bool "Workaround for USB PHY erratum A008997"
+config SYS_FSL_ERRATUM_A009007
+ bool "Workaround for USB PHY erratum A009007"
+
config SYS_FSL_SRDS_1
bool
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index 3d6cc5f..edb64d5 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -94,6 +94,17 @@ static void erratum_a008997(void)
#endif /* CONFIG_SYS_FSL_ERRATUM_A008997 */
}
+static void erratum_a009007(void)
+{
+#ifdef CONFIG_SYS_FSL_ERRATUM_A009007
+ void __iomem *usb_phy = (void __iomem *)USB_PHY_BASE;
+ writew(USB_PHY_RX_EQ_VAL_1, usb_phy + USB_PHY_RX_OVRD_IN_HI);
+ writew(USB_PHY_RX_EQ_VAL_2, usb_phy + USB_PHY_RX_OVRD_IN_HI);
+ writew(USB_PHY_RX_EQ_VAL_3, usb_phy + USB_PHY_RX_OVRD_IN_HI);
+ writew(USB_PHY_RX_EQ_VAL_4, usb_phy + USB_PHY_RX_OVRD_IN_HI);
+#endif /* CONFIG_SYS_FSL_ERRATUM_A009007 */
+}
+
void s_init(void)
{
}
@@ -184,6 +195,7 @@ int arch_soc_init(void)
erratum_a009008();
erratum_a009798();
erratum_a008997();
+ erratum_a009007();
return 0;
}
diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
index c0e4372..9c4c926 100644
--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
@@ -182,10 +182,15 @@ struct ccsr_gur {
#define USB_PHY_MPLL_OVRD_IN_HI 0x0024
#define USB_PHY_LEVEL_OVRD_IN 0x002a
#define USB_PHY_TX_OVRD_IN_HI 0x2002
+#define USB_PHY_RX_OVRD_IN_HI 0x200c
#define USB_PHY_TX_OVRD_DRV_LO_VAL 0x784C
#define USB_PHY_MPLL_OVRD_IN_HI_VAL 0x0080
#define USB_PHY_LEVEL_OVRD_IN_VAL 0xA9A5
#define USB_PHY_TX_OVRD_IN_HI_VAL 0x0003
+#define USB_PHY_RX_EQ_VAL_1 0x0000
+#define USB_PHY_RX_EQ_VAL_2 0x8000
+#define USB_PHY_RX_EQ_VAL_3 0x8004
+#define USB_PHY_RX_EQ_VAL_4 0x800C
/* Supplemental Configuration Unit */
struct ccsr_scfg {
--
1.9.3
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