Hi Kever and Simon,
Thanks very much for the help. Really appreciate it.
> I didn't see your detail steps for getting u-boot-dtb.bin, does it
> include SPL here?
I'm using this method:
> 2. with "CONFIG_ROCKCHIP_SPL_BACK_TO_BROM", which is default setting
...
> I'm confusing with this incorrect DRAM size, could you share the console
> output
> during you flash the image, there should have correct DRAM size info.
> I'm not sure if the DRAM on your board is symmetric or not, or any else
> special.
See below for the output. I noticed that I only have "Channel b"
and not "Channel a". On my other board that boots, I have both a and b. I
wonder if one bank of DDR3 went bad on this
board. What do you think?
Thanks again.
Rick
DDR Version 1.00 20160217
In
Channel b: DDR3 200MHz
Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=8 Size=1024MB
Memory OK
OUT
usb boot ver:20160218
ChipType = 8
...FlashInit enter...
FtlMallocOffset = 8040 8000
FtlMallocOffset = 10040 8000
FtlMallocOffset = 11040 1000
FtlMallocOffset = 19040 8000
FtlMallocOffset = 1a040 1000
1:0 0 7f7f05 22
...NandcInit enter...
0:1200 0 7f7f05 22
FtlMallocOffset = 23040 9000
gNandcVer = 6
SDC_BusRequest: CMD=8 SDC_RESP_TIMEOUT 1815
SDC_BusRequest: CMD=8 SDC_RESP_TIMEOUT 1815
SDC_BusRequest: CMD=8 SDC_RESP_TIMEOUT 1815
SDC_BusRequest: CMD=5 SDC_RESP_TIMEOUT 1815
SDC_BusRequest: CMD=5 SDC_RESP_TIMEOUT 1815
SDC_BusRequest: CMD=5 SDC_RESP_TIMEOUT 1815
SDC_BusRequest: CMD=55 SDC_RESP_TIMEOUT 1815
SDC_BusRequest: CMD=55 SDC_RESP_TIMEOUT 1815
SDC_BusRequest: CMD=55 SDC_RESP_TIMEOUT 1815
mmc Ext_csd, ret=0 ,
Ext[226]=20, bootSize=2000,
Ext[215]=1, Ext[214]=d5, Ext[213]=a0, Ext[212]=0,cap
=1d5a000 R
EL=1f
SdmmcInit=2 0
BootCapSize=2000
UserCapSize=1d5a000
FwPartOffset=2000 , 2000
UsbHook 622396
powerOn 623080
DDR Version 1.00 20160217
In
SRX
Channel b: DDR3 200MHz
Bus Width=32 Col=10 Bank=8 Row=15 CS=1 Die Bus-Width=8 Size=1024MB
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