On Fri, Jan 06, 2017 at 06:55:05AM +0800, Icenowy Zheng wrote: > > > + MCTL_CR_32BIT /* fixme, thats wrong but what boot0 does */ | > > > > What's wrong about it? > > V3s DRAM seems to be 16-bit. > > However, boot0 has this bit set, and without this bit, it cannot work. > > According to Jens' guess (only guess), this may be something more > like full-width and half-width.
Ok. Please put that in the comments then. Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
signature.asc
Description: PGP signature
_______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
