On 22.12.2016 18:36, Moritz Fischer wrote:
> The Zynq Ultrascale MP uses version 1.4 of the Cadence IP core
> which fixes some silicon bugs that needed software workarounds
> in Version 1.0 that was used on Zynq systems.
>
> Signed-off-by: Moritz Fischer <moritz.fisc...@ettus.com>
> Cc: Michal Simek <michal.si...@xilinx.com>
> Cc: Heiko Schocher <h...@denx.de>
> ---
> arch/arm/dts/zynqmp.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
> index ab5c243..20c5efc 100644
> --- a/arch/arm/dts/zynqmp.dtsi
> +++ b/arch/arm/dts/zynqmp.dtsi
> @@ -619,7 +619,7 @@
> };
>
> i2c0: i2c@ff020000 {
> - compatible = "cdns,i2c-r1p10";
> + compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
> status = "disabled";
> interrupt-parent = <&gic>;
> interrupts = <0 17 4>;
> @@ -630,7 +630,7 @@
> };
>
> i2c1: i2c@ff030000 {
> - compatible = "cdns,i2c-r1p10";
> + compatible = "cdns,i2c-r1p14", "cdns,i2c-r1p10";
> status = "disabled";
> interrupt-parent = <&gic>;
> interrupts = <0 18 4>;
>
Applied both.
Thanks,
Michal
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