I think I found a problem in cpu/mips/start.S.
gp register is used to point to the SDRAM. But after gp is adjusted to
proper location, a C function flush_cache is called. But this function
actually changes gp register before gp is used to jump to SDRAM. That
makes the u-boot run from flash and fails to detect CFI.
Here is the assembler code for flush_cache.c
(gdb) disassem 0xb0000798
Dump of assembler code for function flush_cache:
0xb000078c <flush_cache+0>: lui gp,0x3
0xb0000790 <flush_cache+4>: addiu gp,gp,-32300
0xb0000794 <flush_cache+8>: addu gp,gp,t9
And here is how I fixed the issue -
diff --git a/u-boot-2009.08/cpu/mips/start.S
b/u-boot-2009.08/cpu/mips/start.S
index 57db589..0e8f8ed 100644
--- a/u-boot-2009.08/cpu/mips/start.S
+++ b/u-boot-2009.08/cpu/mips/start.S
@@ -321,6 +321,7 @@ relocate_code:
move t6, gp
sub gp, CONFIG_SYS_MONITOR_BASE
add gp, a2 /* gp now adjusted */
+ move t8, gp
sub s1, gp, t6 /* s1 <-- relocation offset */
/*
@@ -358,6 +359,7 @@ relocate_code:
/* Jump to where we've relocated ourselves.
*/
+ move gp, t8
addi t0, s2, in_ram - _start
jr t0
nop
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