> -----Original Message----- > From: Changming Huang [mailto:jerry.hu...@nxp.com] > Sent: Thursday, December 15, 2016 1:45 AM > To: york sun <york....@nxp.com>; u-boot@lists.denx.de; Stuart Yoder > <stuart.yo...@nxp.com> > Cc: Jerry Huang <jerry.hu...@nxp.com> > Subject: [PATCH] armv8: fsl-lsch2: enable snoopable usb read and write > > By default the USB IP on the ls1012a/ls1043a/ls1046a SoCs does not > generat coherent/snoopable transactions. Here enable it in the > SCFG_SNPCNFGCR register. > In addition, the dma-coherent property must be set in USB DTS nodes. > > Signed-off-by: Changming Huang <jerry.hu...@nxp.com> > --- > arch/arm/cpu/armv8/fsl-layerscape/soc.c | 13 ++++++++++++- > .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 6 ++++++ > 2 files changed, 18 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c > b/arch/arm/cpu/armv8/fsl-layerscape/soc.c > index 2f54625..74eb8a1 100644 > --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c > +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c > @@ -340,6 +340,7 @@ void fsl_lsch2_early_init_f(void) > { > struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; > struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; > + u32 snp_usb; > > #ifdef CONFIG_LAYERSCAPE_NS_ACCESS > enable_layerscape_ns_access(); > @@ -352,11 +353,21 @@ void fsl_lsch2_early_init_f(void) > #if defined(CONFIG_FSL_QSPI) && !defined(CONFIG_QSPI_BOOT) > out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL); > #endif > + > + snp_usb = SCFG_SNPCNFGCR_USB1RDSNP | SCFG_SNPCNFGCR_USB1WRSNP; > +#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) > + snp_usb |= SCFG_SNPCNFGCR_USB2WRSNP | > + SCFG_SNPCNFGCR_USB2RDSNP | > + SCFG_SNPCNFGCR_USB3WRSNP | > + SCFG_SNPCNFGCR_USB3RDSNP; > +#endif > + > /* Make SEC reads and writes snoopable */
Fix the above comment...it is not only about SEC anymore. Stuart _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
