By default the USB IP on the ls1012a/ls1043a/ls1046a SoCs does not
generat coherent/snoopable transactions. Here enable it in the
SCFG_SNPCNFGCR register.
In addition, the dma-coherent property must be set in USB DTS nodes.
Signed-off-by: Changming Huang <jerry.hu...@nxp.com>
---
Changes in v2:
- fix one comment that is not only for SEC
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 15 +++++++++++++--
.../include/asm/arch-fsl-layerscape/immap_lsch2.h | 6 ++++++
2 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 2f54625..c1dbe53 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -340,6 +340,7 @@ void fsl_lsch2_early_init_f(void)
{
struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
+ u32 snp_usb;
#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
enable_layerscape_ns_access();
@@ -352,11 +353,21 @@ void fsl_lsch2_early_init_f(void)
#if defined(CONFIG_FSL_QSPI) && !defined(CONFIG_QSPI_BOOT)
out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL);
#endif
- /* Make SEC reads and writes snoopable */
+
+ snp_usb = SCFG_SNPCNFGCR_USB1RDSNP | SCFG_SNPCNFGCR_USB1WRSNP;
+#if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
+ snp_usb |= SCFG_SNPCNFGCR_USB2WRSNP |
+ SCFG_SNPCNFGCR_USB2RDSNP |
+ SCFG_SNPCNFGCR_USB3WRSNP |
+ SCFG_SNPCNFGCR_USB3RDSNP;
+#endif
+
+ /* Enable some IP's reads and writes snoopable */
setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP |
SCFG_SNPCNFGCR_SECWRSNP |
SCFG_SNPCNFGCR_SATARDSNP |
- SCFG_SNPCNFGCR_SATAWRSNP);
+ SCFG_SNPCNFGCR_SATAWRSNP |
+ snp_usb);
/*
* Enable snoop requests and DVM message requests for
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index b3cfd89..b82db03 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -340,6 +340,12 @@ struct ccsr_gur {
#define SCFG_SNPCNFGCR_SECWRSNP 0x40000000
#define SCFG_SNPCNFGCR_SATARDSNP 0x00800000
#define SCFG_SNPCNFGCR_SATAWRSNP 0x00400000
+#define SCFG_SNPCNFGCR_USB1RDSNP 0x00200000
+#define SCFG_SNPCNFGCR_USB1WRSNP 0x00100000
+#define SCFG_SNPCNFGCR_USB2WRSNP 0x00010000
+#define SCFG_SNPCNFGCR_USB2RDSNP 0x00008000
+#define SCFG_SNPCNFGCR_USB3WRSNP 0x00004000
+#define SCFG_SNPCNFGCR_USB3RDSNP 0x00002000
/* Supplemental Configuration Unit */
struct ccsr_scfg {
--
1.7.9.5
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