On 11/24/2016 10:45 AM, Christoph Fritz wrote:
> This patch adds initial support for Samtec VIN|ING 2000 board.
>
> Signed-off-by: Christoph Fritz <chf.fr...@googlemail.com>
> ---
Changelog is missing ?
[...]
> +int board_eth_init(bd_t *bis)
> +{
> + struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
> + int ret;
> + unsigned char eth1addr[6];
> +
> + /* just to get secound mac address */
> + imx_get_mac_from_fuse(1, eth1addr);
> + if (!getenv("eth1addr") && is_valid_ethaddr(eth1addr))
> + eth_setenv_enetaddr("eth1addr", eth1addr);
> +
> + imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads));
> +
> + /*
> + * Generate phy reference clock via pin IOMUX ENET_REF_CLK1/2 by erasing
> + * ENET1/2_TX_CLK_DIR gpr1[14:13], so that reference clock is driven by
> + * ref_enetpll0/1 and enable ENET1/2_TX_CLK output driver.
> + */
> + clrsetbits_le32(&iomuxc_regs->gpr[1],
> + IOMUX_GPR1_FEC1_CLOCK_MUX2_SEL_MASK |
> + IOMUX_GPR1_FEC2_CLOCK_MUX2_SEL_MASK,
> + IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK |
> + IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
> +
> + ret = enable_fec_anatop_clock(0, ENET_50MHZ);
> + if (ret) {
> + printf("FEC anatop MXC: %s:failed (%0x)\n", __func__, ret);
ret is signed integer, so use %i m not %0x
> + goto eth_fail;
> + }
> +
> + /* reset phy */
> + gpio_direction_output(PHY_RESET, 0);
> + mdelay(16);
> + gpio_set_value(PHY_RESET, 1);
> + mdelay(1);
> +
> + ret = fecmxc_initialize_multi(bis, 0, CONFIG_FEC_MXC_PHYADDR,
> + IMX_FEC_BASE);
> + if (ret) {
> + printf("FEC MXC: %s:failed\n", __func__);
If you provide ret value above, provide it here as well. You can even
move this print to failpath.
> + goto eth_fail;
> + }
> +
> + return ret;
> +
> +eth_fail:
> + gpio_set_value(PHY_RESET, 0);
> + return ret;
> +}
[...]
It's great otherwise, thanks.
--
Best regards,
Marek Vasut
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