On Wed, Nov 23, 2016 at 12:54:40PM +0530, Lokesh Vutla wrote: > From: Suman Anna <s-a...@ti.com> > > Redefine the macros used to define the voltage values and the > efuse register offsets based on OPP for all the voltage domains. > This is done using Kconfig macros that can be set in a defconfig > or selected during a config step. This allows a voltage domain > to be configured/set to a corresponding voltage value depending > on the OPP selection choice. > > The Kconfig choices have been added for MPU, DSPEVE, IVA and GPU > voltage domains, with the MPU domain restricted to OPP_NOM. The > OPP_OD and OPP_HIGH options will be added when the support for > configuring the MPU clock frequency is added. The clock > configuration for other voltage domains is out of scope in > u-boot code. > > The CORE voltage domain does not have separate voltage values > and efuse register offset at different OPPs, while the MPU > voltage domain only has different efuse register offsets for > different OPPs, but uses the same voltage value. Any different > choices of OPPs for voltage domains on common ganged-rails > is automatically taken care to select the corresponding > highest OPP voltage value. > > Signed-off-by: Suman Anna <s-a...@ti.com> > Signed-off-by: Lokesh Vutla <lokeshvu...@ti.com>
Reviewed-by: Tom Rini <tr...@konsulko.com> -- Tom
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