Juno uses a 1:1 mapping between CPU and PCI addresses for IO. First,
that will trip devices that cannot use more than 16 bits of addresses
for IO, second it is un-necessary as the system can handle zero-based
PCI addresses just fine.
Change the mapping to start IO bus addresses from zero.
Signed-off-by: Liviu Dudau <liviu.du...@foss.arm.com>
---
board/armltd/vexpress64/pcie.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/armltd/vexpress64/pcie.c b/board/armltd/vexpress64/pcie.c
index b3fb09c..0608a5a 100644
--- a/board/armltd/vexpress64/pcie.c
+++ b/board/armltd/vexpress64/pcie.c
@@ -123,7 +123,7 @@ void xr3pci_setup_atr(void)
base += XR3PCI_ATR_TABLE_SIZE;
/* setup IO space translation */
- xr3pci_set_atr_entry(base, XR3_PCI_IOSPACE_START, XR3_PCI_IOSPACE_START,
+ xr3pci_set_atr_entry(base, XR3_PCI_IOSPACE_START, 0,
XR3_PCI_IOSPACE_SIZE, XR3PCI_ATR_TRSLID_PCIE_IO);
base += XR3PCI_ATR_TABLE_SIZE;
--
2.10.2
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