From: VNSL Durga <vnsl.durga.cha...@xilinx.com> Added clks for ep108 platform.
Signed-off-by: VNSL Durga <vnsld...@xilinx.com> Signed-off-by: Michal Simek <michal.si...@xilinx.com> --- arch/arm/dts/zynqmp-ep108-clk.dtsi | 44 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm/dts/zynqmp-ep108-clk.dtsi b/arch/arm/dts/zynqmp-ep108-clk.dtsi index b3ce0de549e0..6b6dca60e86f 100644 --- a/arch/arm/dts/zynqmp-ep108-clk.dtsi +++ b/arch/arm/dts/zynqmp-ep108-clk.dtsi @@ -35,6 +35,18 @@ clock-accuracy = <100>; }; + clk100: clk100 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + }; + + clk600: clk600 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <600000000>; + }; + dp_aud_clk: clock1 { compatible = "fixed-clock"; #clock-cells = <0>; @@ -47,6 +59,38 @@ clocks = <&misc_clk &misc_clk>; }; +&fpd_dma_chan1 { + clocks = <&clk600>, <&clk100>; +}; + +&fpd_dma_chan2 { + clocks = <&clk600>, <&clk100>; +}; + +&fpd_dma_chan3 { + clocks = <&clk600>, <&clk100>; +}; + +&fpd_dma_chan4 { + clocks = <&clk600>, <&clk100>; +}; + +&fpd_dma_chan5 { + clocks = <&clk600>, <&clk100>; +}; + +&fpd_dma_chan6 { + clocks = <&clk600>, <&clk100>; +}; + +&fpd_dma_chan7 { + clocks = <&clk600>, <&clk100>; +}; + +&fpd_dma_chan8 { + clocks = <&clk600>, <&clk100>; +}; + &gem0 { clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>; }; -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot