This commit introduces UART clock device for AXS10x boards. It
provides a fixed clock rate of 33,333333 MHz.
It is used as an input clock by uart0 driver, so we add
corresponding reference to uart0 node in device tree.
Also we removing legacy clock specifications via
CONFIG_SYS_NS16550_CLK which we finally may get rid of.
Signed-off-by: Vlad Zakharov <vzak...@synopsys.com>
---
arch/arc/dts/axs10x.dts | 8 ++++++++
include/configs/axs10x.h | 1 -
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arc/dts/axs10x.dts b/arch/arc/dts/axs10x.dts
index 391d067..0b0e2bb 100644
--- a/arch/arc/dts/axs10x.dts
+++ b/arch/arc/dts/axs10x.dts
@@ -23,9 +23,17 @@
};
};
+ uartclk: uartclk {
+ compatible = "fixed-clock";
+ clock-frequency = <33333333>;
+ #clock-cells = <0>;
+ u-boot,dm-pre-reloc;
+ };
+
uart0: serial0@e0022000 {
compatible = "snps,dw-apb-uart";
reg = <0xe0022000 0x1000>;
+ clocks = <&uartclk>;
reg-shift = <2>;
reg-io-width = <4>;
};
diff --git a/include/configs/axs10x.h b/include/configs/axs10x.h
index b99248e..3546c8d 100644
--- a/include/configs/axs10x.h
+++ b/include/configs/axs10x.h
@@ -52,7 +52,6 @@
*/
#define CONFIG_DW_SERIAL
#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_CLK 33333333
#define CONFIG_SYS_NS16550_MEM32
#define CONFIG_BAUDRATE 115200
--
2.7.4
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