Hi Minghuan, On Mon, Oct 10, 2016 at 4:47 PM, Minghuan Lian <minghuan.l...@nxp.com> wrote: > There are more than five kinds of Layerscape SoCs. unfortunately, > PCIe controller of each SoC is a little bit different. In order > to avoid too many macro definitions, the patch re-implement PCIe > driver based on DM. PCIe dts node is to describe the difference. > > Signed-off-by: Minghuan Lian <minghuan.l...@nxp.com> > --- > .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 8 - > drivers/pci/Kconfig | 8 + > drivers/pci/pcie_layerscape.c | 958 > +++++++++++---------- > include/configs/ls1012a_common.h | 12 + > include/configs/ls1012aqds.h | 24 - > include/configs/ls1012ardb.h | 24 - > include/configs/ls1021aqds.h | 18 +- > include/configs/ls1021atwr.h | 18 +- > include/configs/ls1043a_common.h | 23 +- > include/configs/ls2080a_common.h | 27 +- > include/configs/ls2080aqds.h | 8 - > include/configs/ls2080ardb.h | 8 -
These header file changes should not be put in the same commit of the layerscape PCIe driver conversion. They should be in a separate commit. So you are likely to have 3 commits: firstly add DM codes with #ifdef CONFIG_DM_PCI #endif in the layerscape PCIe driver, without breaking the existing board support. 2nd commit to update the boards configuration files (defconfig and the header), and 3rd commit to remove the #ifdef CONFIG_DM_PCI #endif, only leaving the DM version codes. > 12 files changed, 526 insertions(+), 610 deletions(-) > > diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h > b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h > index 7acba27..bd07808 100644 > --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h > +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h > @@ -104,14 +104,6 @@ > #define CONFIG_SYS_PCIE2_PHYS_ADDR 0x1200000000ULL > #define CONFIG_SYS_PCIE3_PHYS_ADDR 0x1400000000ULL > #define CONFIG_SYS_PCIE4_PHYS_ADDR 0x1600000000ULL > -/* LUT registers */ > -#define PCIE_LUT_BASE 0x80000 > -#define PCIE_LUT_LCTRL0 0x7F8 > -#define PCIE_LUT_DBG 0x7FC > -#define PCIE_LUT_UDR(n) (0x800 + (n) * 8) > -#define PCIE_LUT_LDR(n) (0x804 + (n) * 8) > -#define PCIE_LUT_ENABLE (1 << 31) > -#define PCIE_LUT_ENTRY_COUNT 32 > [snip] Regards, Bin _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
