On 09/23/2016 03:49 PM, Joe Hershberger wrote:
Hi Stephen,
Thanks for sending this! I have some comments below.
Cheers,
-Joe
On Mon, Sep 12, 2016 at 12:48 PM, Stephen Warren <swar...@wwwdotorg.org> wrote:
From: Stephen Warren <swar...@nvidia.com>
This driver supports the Synopsys Designware Ethernet QoS (Quality of
Service) a/k/a eqos IP block, which is a different design than the HW
supported by the existing designware.c driver. The IP supports many
options for bus type, clocking/reset structure, and feature list. This
driver currently supports the specific configuration used in NVIDIA's
Tegra186 chip, but should be extensible to other combinations quite
easily, as explained in the source.
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
+static int eqos_start(struct udevice *dev)
+ /* Update the MAC address */
+ val = (plat->enetaddr[5] << 8) |
+ (plat->enetaddr[4]);
+ writel(val, eqos->regs + EQOS_MAC_ADDRESS0_HIGH);
+ val = (plat->enetaddr[3] << 24) |
+ (plat->enetaddr[2] << 16) |
+ (plat->enetaddr[1] << 8) |
+ (plat->enetaddr[0]);
+ writel(val, eqos->regs + EQOS_MAC_ADDRESS0_LOW);
This should be implemented in write_hwaddr() op.
That op is never called because this driver is only instantiated by
device tree. Since this code can't be skipped, it can't be moved to that op.
+int eqos_send(struct udevice *dev, void *packet, int length)
+ for (i = 0; i < 1000000; i++) {
+ eqos_inval_desc(tx_desc);
+ if (!(readl(&tx_desc[3]) & EQOS_DESC3_OWN))
+ return 0;
Use wait_bit() here.
That function won't work here due to the need to call
eqos_inval_desc(tx_desc) inside the loop.
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