Hello Paul, > > diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S > index fc6dd66..dd37ac3 100644 > --- a/arch/mips/cpu/start.S > +++ b/arch/mips/cpu/start.S > @@ -112,6 +112,31 @@ ENTRY(_start) > > .align 4 > reset: > +#if __mips_isa_rev >= 6 > + .set push > + .set reorder > + mfc0 t0, CP0_CONFIG, 1 > + bgez t0, 1f > + mfc0 t0, CP0_CONFIG, 2 > + bgez t0, 1f > + mfc0 t0, CP0_CONFIG, 3 > + bgez t0, 1f > + mfc0 t0, CP0_CONFIG, 4 > + bgez t0, 1f > + mfc0 t0, CP0_CONFIG, 5 > + and t0, t0, MIPS_CONF5_VP > + beqz t0, 1f > + > + mfc0 t0, CP0_GLOBALNUMBER > + b 2f > + .set pop > +#endif > + > +1: mfc0 t0, CP0_EBASE > + and t0, t0, EBASE_CPUNUM > + > + /* Hang if this isn't the first CPU in the system */ > +2: bnez t0, .
This loop should include a "wait" instruction. Otherwise the CPU will burn power for doing nothing. Thomas _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
