On 09/15/2016 09:27 AM, Chin Liang See wrote: > Adding new handoff for SDRAM ctrcfg.extratime1 which is > required for stabil LPDDR2 operation
Same comment as 2/9 > Signed-off-by: Chin Liang See <cl...@altera.com> > --- > board/denx/mcvevk/qts/sdram_config.h | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/board/denx/mcvevk/qts/sdram_config.h > b/board/denx/mcvevk/qts/sdram_config.h > index 30c4d7d..0328850 100644 > --- a/board/denx/mcvevk/qts/sdram_config.h > +++ b/board/denx/mcvevk/qts/sdram_config.h > @@ -49,6 +49,9 @@ > #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING3_TRTP 5 > #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_PWRDOWNEXIT 3 > #define CONFIG_HPS_SDR_CTRLCFG_DRAMTIMING4_SELFRFSHEXIT 512 > +#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR 2 > +#define CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_BC 2 > +#define > CONFIG_HPS_SDR_CTRLCFG_EXTRATIME1_CFG_EXTRA_CTL_CLK_RD_TO_WR_DIFF_CHIP 2 > #define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC 0 > #define CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE 0 > #define CONFIG_HPS_SDR_CTRLCFG_FPGAPORTRST 0x0 > -- Best regards, Marek Vasut _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
