On 09/06/2016 04:15 AM, Prabhakar Kushwaha wrote: > IFC IP clock is always a constant divisor of platform clock > pre-defined per SoC. Clock Control register (CCR) used in > current implementation governs IFC IP output clock. > > So update IFC IP clock to be defined as per predefined clock > divisor of platform clock. > > Signed-off-by: Prabhakar Kushwaha <prabhakar.kushw...@nxp.com> > --- > README | 3 +++ > arch/arm/cpu/armv7/ls102xa/clock.c | 10 ++-------- > arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 10 ++-------- > arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c | 10 ++-------- > arch/arm/include/asm/arch-fsl-layerscape/config.h | 3 +++ > arch/arm/include/asm/arch-ls102xa/config.h | 1 + > arch/powerpc/cpu/mpc85xx/speed.c | 10 ++-------- > arch/powerpc/include/asm/config_mpc85xx.h | 9 +++++++++ > 8 files changed, 24 insertions(+), 32 deletions(-)
Prabkahar, Two concerns here 1, it is not only IFC for powerpc. Older SoCs have local bus. That's why the variable is named freq_localbus.. 2, what's the reason for this change? Is it wrong to use ccr to calculate the clock? Or is it because recent Layerscape SoCs have platform PLL different from platform clock? If the latter, can we limit the fix to platform clock and not changing powerpc? York _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
