On 5 August 2016 at 17:00, Max Filippov <jcmvb...@gmail.com> wrote: > From: Chris Zankel <ch...@zankel.net> > > The Xtensa processor architecture is a configurable, extensible, > and synthesizable 32-bit RISC processor core provided by Cadence. > > This is the first part of the basic architecture port with changes to > common files. The 'arch/xtensa' directory, and boards and additional > drivers will be in separate commits. > > Signed-off-by: Chris Zankel <ch...@zankel.net> > Signed-off-by: Max Filippov <jcmvb...@gmail.com> > --- > Changes v2->v3: > - drop changes to the MAKEALL script; > - refactor do_bdinfo; > - fix wording of doc/README.xtensa; > - rewrite memory exception handling part in doc/README.xtensa. > - add bss clearing call to init_sequence_f; > --- > MAINTAINERS | 5 +++ > Makefile | 10 ++++- > cmd/bdinfo.c | 8 ++++ > common/board_f.c | 12 ++++-- > common/image.c | 1 + > doc/README.xtensa | 97 > +++++++++++++++++++++++++++++++++++++++++++++ > examples/standalone/stubs.c | 47 ++++++++++++++++++++++ > include/image.h | 1 + > include/linux/stat.h | 4 +- > 9 files changed, 179 insertions(+), 6 deletions(-) > create mode 100644 doc/README.xtensa
Reviewed-by: Simon Glass <s...@chromium.org> _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
