On Thu, Aug 4, 2016 at 11:48 PM, Joe Hershberger
<joe.hershber...@gmail.com> wrote:
> On Tue, Aug 2, 2016 at 6:31 AM, Max Filippov <jcmvb...@gmail.com> wrote:
>> Implement MDIO bus read/write functions, initialize the bus and scan for
>> the PHY when phylib is enabled. Limit PHY speeds to 10/100 Mbps.
>>
>> Cc: Michal Simek <mon...@monstr.eu>
>> Signed-off-by: Max Filippov <jcmvb...@gmail.com>
[...]
>> +static int ethoc_mdio_read(struct mii_dev *bus, int addr, int devad, int
>> reg)
>> +{
>> + struct ethoc *priv = bus->priv;
>> + ulong tmo = get_timer(0);
>> +
>> + ethoc_write(priv, MIIADDRESS, MIIADDRESS_ADDR(addr, reg));
>> + ethoc_write(priv, MIICOMMAND, MIICOMMAND_READ);
>> +
>> + while (get_timer(tmo) < CONFIG_SYS_HZ) {
>> + u32 status = ethoc_read(priv, MIISTATUS);
>> +
>> + if (!(status & MIISTATUS_BUSY)) {
>
> It would be good to use wait_for_bit(). You could add a small helper
> to this file that adds the iobase to the addr and then calls
> wait_for_bit().
Ok.
[...]
>> static int ethoc_init(struct eth_device *dev, bd_t *bd)
>> {
>> struct ethoc *priv = (struct ethoc *)dev->priv;
>>
>> - priv->iobase = ioremap(dev->iobase, ETHOC_IOSIZE);
>
> Why? Is this an accident? At the very least it seems unrelated and
> should be a separate patch.
Oops, right. I've been moving this bit around several times and
apparently haven't cleaned up all of its traces.
--
Thanks.
-- Max
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