Hello Bin,
Am 05.08.2016 um 07:46 schrieb Bin Meng:
Simon, Stefan,
On Tue, Jul 26, 2016 at 8:13 PM, Stefan Roese <s...@denx.de> wrote:
Hi Simon,
On 25.07.2016 04:07, Simon Glass wrote:
On 28 June 2016 at 07:44, Stefan Roese <s...@denx.de> wrote:
This patch adds support for the SMBus block read/write functionality.
Other protocols like the SMBus quick command need to get added
if this is needed.
This patch also removed the SMBus related defines from the Ivybridge
pch.h header. As they are integrated in this driver and should be
used from here. This change is added in this patch to avoid compile
breakage to keep the source git bisectable.
Tested on a congatec BayTrail board to configure the SMSC2513 USB
hub.
Signed-off-by: Stefan Roese <s...@denx.de>
Cc: Bin Meng <bmeng...@gmail.com>
Cc: Simon Glass <s...@chromium.org>
Cc: Heiko Schocher <h...@denx.de>
---
Simon, I'm not sure if this change breaks your Ivybridge targets
using the probe part of this driver. Could you please let me
know if this works? Or let me know what needs changes here?
Yes this breaks booting on link. Something odd is going on because the
call to set up I2C in ivybridge's print_cpuinfo() returns a very
strange error -726376.
Hmmm, very strange.
But I then enabled CONFIG_CMD_I2C and it boots. However 'i2c probe'
produces a lot of errors like this:
ERROR: len=0 on read
smbus_block_read (107): dev=0x3b offs=0x0 len=0x1
smbus_block_read (136): count=0 (len=1)
A general question:
Is the SMBus controller on Ivybridge also exported as PCI device? If
yes, can't we just use the PCI code as done for BayTrail for this
platform as well? And get rid of the platform specific stuff this
way?
Could you send me the output of "pci 0 long" on this platform?
Do you plan to get this I2C merged in this release? If so, please work
this out .. I don't feel comfortable to apply this at present.
Full Ack.
bye,
Heiko
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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