PCF8575 does not have any registers hence, offset field needs to be
ignored for i2c read/write. Therefore populate u-boot,i2c-offset-len
with 0 in PCF8575 DT nodes.
Signed-off-by: Vignesh R <vigne...@ti.com>
---
v3: New patch.
arch/arm/dts/dra7-evm.dts | 1 +
arch/arm/dts/dra72-evm.dts | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/arm/dts/dra7-evm.dts b/arch/arm/dts/dra7-evm.dts
index 429b9edc1b2b..fc62904621f5 100644
--- a/arch/arm/dts/dra7-evm.dts
+++ b/arch/arm/dts/dra7-evm.dts
@@ -415,6 +415,7 @@
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
+ u-boot,i2c-offset-len = <0>;
};
};
diff --git a/arch/arm/dts/dra72-evm.dts b/arch/arm/dts/dra72-evm.dts
index ced2f1166d8c..06fb3d895a27 100644
--- a/arch/arm/dts/dra72-evm.dts
+++ b/arch/arm/dts/dra72-evm.dts
@@ -348,6 +348,7 @@
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
+ u-boot,i2c-offset-len = <0>;
};
};
@@ -369,6 +370,7 @@
* VIN6_SEL_S0 is low, thus selecting McASP3 over VIN6
*/
lines-initial-states = <0x0f2b>;
+ u-boot,i2c-offset-len = <0>;
};
};
--
2.9.2
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