Hi Simon, On Tue, Jul 12, 2016 at 03:56:46PM -0600, Simon Glass wrote: > On 8 July 2016 at 09:42, Max Filippov <jcmvb...@gmail.com> wrote: > > From: Chris Zankel <ch...@zankel.net> > > Commit message?
Ok, will add. > > > > Signed-off-by: Chris Zankel <ch...@zankel.net> > > Signed-off-by: Max Filippov <jcmvb...@gmail.com> > > --- > > arch/xtensa/include/asm/arch-dc232b/core.h | 422 > > ++++++++++++++++++++++++++ > > arch/xtensa/include/asm/arch-dc232b/tie-asm.h | 120 ++++++++ > > arch/xtensa/include/asm/arch-dc232b/tie.h | 129 ++++++++ > > 3 files changed, 671 insertions(+) > > create mode 100644 arch/xtensa/include/asm/arch-dc232b/core.h > > create mode 100644 arch/xtensa/include/asm/arch-dc232b/tie-asm.h > > create mode 100644 arch/xtensa/include/asm/arch-dc232b/tie.h > > Reviewed-by: Simon Glass <s...@chromium.org> > > nits below. > > > > > diff --git a/arch/xtensa/include/asm/arch-dc232b/core.h > > b/arch/xtensa/include/asm/arch-dc232b/core.h > > new file mode 100644 > > index 0000000..7fd1aee > > --- /dev/null > > +++ b/arch/xtensa/include/asm/arch-dc232b/core.h > > @@ -0,0 +1,422 @@ > > +/* > > + * Xtensa processor core configuration information. > > + * > > + * Copyright (c) 1999-2007 Tensilica Inc. > > + * > > + * SPDX-License-Identifier: GPL-2.0+ > > + */ > > + > > +#ifndef _XTENSA_CORE_CONFIGURATION_H > > +#define _XTENSA_CORE_CONFIGURATION_H > > + > > + > > +/**************************************************************************** > > + Parameters Useful for Any Code, USER or PRIVILEGED > > + > > ****************************************************************************/ > > + > > +/* > > + * Note: Macros of the form XCHAL_HAVE_*** have a value of 1 if the > > option is > > + * configured, and a value of 0 otherwise. These macros are always > > defined. > > + */ > > + > > + > > +/*---------------------------------------------------------------------- > > + ISA > > + ----------------------------------------------------------------------*/ > > + > > +#define XCHAL_HAVE_BE 0 /* big-endian byte ordering > > */ > > +#define XCHAL_HAVE_WINDOWED 1 /* windowed registers > > option */ > > +#define XCHAL_NUM_AREGS 32 /* num of physical > > addr regs */ > > +#define XCHAL_NUM_AREGS_LOG2 5 /* log2(XCHAL_NUM_AREGS) */ > > +#define XCHAL_MAX_INSTRUCTION_SIZE 3 /* max instr bytes (3..8) */ > > +#define XCHAL_HAVE_DEBUG 1 /* debug option */ > > +#define XCHAL_HAVE_DENSITY 1 /* 16-bit instructions */ > > +#define XCHAL_HAVE_LOOPS 1 /* zero-overhead loops */ > > +#define XCHAL_HAVE_NSA 1 /* NSA/NSAU instructions */ > > +#define XCHAL_HAVE_MINMAX 1 /* MIN/MAX instructions */ > > +#define XCHAL_HAVE_SEXT 1 /* SEXT instruction > > */ > > +#define XCHAL_HAVE_CLAMPS 1 /* CLAMPS instruction */ > > +#define XCHAL_HAVE_MUL16 1 /* MUL16S/MUL16U > > instructions */ > > +#define XCHAL_HAVE_MUL32 1 /* MULL instruction */ > > +#define XCHAL_HAVE_MUL32_HIGH 0 /* MULUH/MULSH instructions > > */ > > +#define XCHAL_HAVE_DIV32 1 /* QUOS/QUOU/REMS/REMU > > instructions */ > > +#define XCHAL_HAVE_L32R 1 /* L32R instruction > > */ > > +#define XCHAL_HAVE_ABSOLUTE_LITERALS 1 /* non-PC-rel (extended) > > L32R */ > > +#define XCHAL_HAVE_CONST16 0 /* CONST16 instruction */ > > +#define XCHAL_HAVE_ADDX 1 /* ADDX#/SUBX# > > instructions */ > > +#define XCHAL_HAVE_WIDE_BRANCHES 0 /* B*.W18 or B*.W15 instr's > > */ > > +#define XCHAL_HAVE_PREDICTED_BRANCHES 0 /* B[EQ/EQZ/NE/NEZ]T > > instr's */ > > +#define XCHAL_HAVE_CALL4AND12 1 /* (obsolete option) */ > > +#define XCHAL_HAVE_ABS 1 /* ABS instruction */ > > +/*#define XCHAL_HAVE_POPC 0*/ /* POPC instruction */ > > +/*#define XCHAL_HAVE_CRC 0*/ /* CRC instruction */ > > +#define XCHAL_HAVE_RELEASE_SYNC 1 /* L32AI/S32RI > > instructions */ > > +#define XCHAL_HAVE_S32C1I 1 /* S32C1I instruction */ > > +#define XCHAL_HAVE_SPECULATION 0 /* speculation */ > > +#define XCHAL_HAVE_FULL_RESET 1 /* all regs/state reset */ > > +#define XCHAL_NUM_CONTEXTS 1 /* */ > > +#define XCHAL_NUM_MISC_REGS 2 /* num of scratch regs > > (0..4) */ > > +#define XCHAL_HAVE_TAP_MASTER 0 /* JTAG TAP control instr's > > */ > > +#define XCHAL_HAVE_PRID 1 /* processor ID > > register */ > > +#define XCHAL_HAVE_THREADPTR 1 /* THREADPTR register */ > > +#define XCHAL_HAVE_BOOLEANS 0 /* boolean registers */ > > +#define XCHAL_HAVE_CP 1 /* CPENABLE reg > > (coprocessor) */ > > +#define XCHAL_CP_MAXCFG 8 /* max allowed cp > > id plus one */ > > +#define XCHAL_HAVE_MAC16 1 /* MAC16 package */ > > +#define XCHAL_HAVE_VECTORFPU2005 0 /* vector floating-point > > pkg */ > > +#define XCHAL_HAVE_FP 0 /* floating point pkg */ > > +#define XCHAL_HAVE_VECTRA1 0 /* Vectra I pkg */ > > +#define XCHAL_HAVE_VECTRALX 0 /* Vectra LX pkg */ > > +#define XCHAL_HAVE_HIFI2 0 /* HiFi2 Audio Engine pkg */ > > + > > + > > +/*---------------------------------------------------------------------- > > Do we need all these lines and stars? These files are autogenerated, so I tried to avoid editing them. Sure I can remove these lines and start if absolutely necessary. -- Thanks. -- Max _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
