From: Hou Zhiqiang <zhiqiang....@nxp.com>
Signed-off-by: Hou Zhiqiang <zhiqiang....@nxp.com>
---
.../include/asm/arch-fsl-layerscape/ns_access.h | 1 +
board/freescale/common/ns_access.c | 28 ++++++++++++++++++++++
include/fsl_csu.h | 1 +
3 files changed, 30 insertions(+)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
index db76066..f46f1d8 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
@@ -6,6 +6,7 @@
#ifndef __FSL_NS_ACCESS_H_
#define __FSL_NS_ACCESS_H_
+#include <fsl_csu.h>
enum csu_cslx_ind {
CSU_CSLX_PCIE2_IO = 0,
diff --git a/board/freescale/common/ns_access.c
b/board/freescale/common/ns_access.c
index c3d7a5e..80e4b61 100644
--- a/board/freescale/common/ns_access.c
+++ b/board/freescale/common/ns_access.c
@@ -8,6 +8,7 @@
#include <asm/io.h>
#include <fsl_csu.h>
#include <asm/arch/ns_access.h>
+#include <asm/arch/fsl_serdes.h>
void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val)
{
@@ -40,3 +41,30 @@ void enable_layerscape_ns_access(void)
{
enable_devices_ns_access(ns_dev, ARRAY_SIZE(ns_dev));
}
+
+void disable_pcie_ns_access(int pcie)
+{
+ switch (pcie) {
+#ifdef CONFIG_PCIE1
+ case PCIE1:
+ set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE1], 0);
+ set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE1_IO], 0);
+ return;
+#endif
+#ifdef CONFIG_PCIE2
+ case PCIE2:
+ set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE2], 0);
+ set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE2_IO], 0);
+ return;
+#endif
+#ifdef CONFIG_PCIE3
+ case PCIE3:
+ set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE3], 0);
+ set_devices_ns_access(&ns_dev[CSU_CSLX_PCIE3_IO], 0);
+ return;
+#endif
+ default:
+ debug("The PCIE%d doesn't exist!\n", pcie);
+ return;
+ }
+}
diff --git a/include/fsl_csu.h b/include/fsl_csu.h
index 57a9985..42ca433 100644
--- a/include/fsl_csu.h
+++ b/include/fsl_csu.h
@@ -31,5 +31,6 @@ struct csu_ns_dev {
void enable_layerscape_ns_access(void);
void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val);
+void disable_pcie_ns_access(int pcie);
#endif
--
2.1.0.27.g96db324
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