On Tue, Jun 28, 2016 at 12:16 PM, Chen-Yu Tsai <w...@csie.org> wrote: > On Tue, Jun 14, 2016 at 3:01 PM, <macro.wav...@gmail.com> wrote: >> From: Hongbo Zhang <hongbo.zh...@nxp.com> >> >> LS1021 offers two secure OCRAM blocks for trustzone. >> This patch moves all the secure text sections into the OCRAM. >> >> Signed-off-by: Wang Dongsheng <dongsheng.w...@nxp.com> >> Signed-off-by: Hongbo Zhang <hongbo.zh...@nxp.com> >> --- >> arch/arm/include/asm/arch-ls102xa/config.h | 2 +- >> include/configs/ls1021atwr.h | 2 ++ >> 2 files changed, 3 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm/include/asm/arch-ls102xa/config.h >> b/arch/arm/include/asm/arch-ls102xa/config.h >> index 7a0e4bf..4729044 100644 >> --- a/arch/arm/include/asm/arch-ls102xa/config.h >> +++ b/arch/arm/include/asm/arch-ls102xa/config.h >> @@ -10,7 +10,7 @@ >> #define CONFIG_SYS_CACHELINE_SIZE 64 >> >> #define OCRAM_BASE_ADDR 0x10000000 >> -#define OCRAM_SIZE 0x00020000 >> +#define OCRAM_SIZE 0x00010000 >> #define OCRAM_BASE_S_ADDR 0x10010000 >> #define OCRAM_S_SIZE 0x00010000 >> >> diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h >> index 9d0c4fe..e6fbd77 100644 >> --- a/include/configs/ls1021atwr.h >> +++ b/include/configs/ls1021atwr.h >> @@ -12,6 +12,8 @@ >> #define CONFIG_ARMV7_PSCI >> #define CONFIG_ARMV7_PSCI_1_0 >> >> +#define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR >> + >> #define CONFIG_SYS_FSL_CLK >> >> #define CONFIG_DISPLAY_CPUINFO >> -- >> 2.1.4 >> > > The patch itself looks good. Though I wonder if there's some register > you need to configure to split access to the 2 SRAM blocks? If they > are both secure-only, then everything's fine. > No other registers needed to be configured, this works fine.
> Reviewed-by: Chen-Yu Tsai <w...@csie.org> Thanks for the tag. _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
