On 14 June 2016 at 11:21, Sumit Garg <sumit.g...@nxp.com> wrote: > For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC. > In non-secure boot scenario from NAND, this address will map to CPC > configured as SRAM. But in case of secure boot, this default address > always maps to IBR (Internal Boot ROM). > The IBR code requires that the bootloader(U-boot) must lie in 0 to 3.5G > address space i.e. 0x0 - 0xDFFFFFFF. > > For secure boot target from NAND, the text base for SPL is kept same as > non-secure boot target i.e. 0xFFFx_xxxx but the SPL U-boot binary will > be copied to CPC configured as SRAM with address in 0-3.5G(0xBFFC_0000) > As a the virtual and physical address of CPC would be different. The > virtual address 0xFFFx_xxxx needs to be mapped to physical address > 0xBFFx_xxxx. > > Create a new PBI file to configure CPC as SRAM with address 0xBFFC0000 > and update DCFG SCRTACH1 register with location of Header required for > secure boot. > > The changes are similar to > commit 467a40dfe35f48d830f01a72617207d03ca85b4d > powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041 > > While P3041 has a 1MB CPC and does not require SPL. On T104x, CPC > is only 256K and thus SPL framework is used. > The changes are only applicable for SPL U-Boot running out of CPC SRAM > and not the next level U-Boot loaded on DDR. > > Reviewed-by: Ruchika Gupta <ruchika.gu...@nxp.com> > Signed-off-by: Aneesh Bansal <aneesh.ban...@nxp.com> > Signed-off-by: Sumit Garg <sumit.g...@nxp.com> > --- > Changes in v2: > Patches rebased > > Changes in v3: > Patches rebased > > Changes in v4: > Generic changes in lib, drivers, common Makefiles removed from > this patchset. Rebased this patchset on top of patch [1], so this > patchset is dependent on patch [1]. > > [1]https://patchwork.ozlabs.org/patch/627664/ > > Changes in v5: > Check for def CONFIG_SPL_DM and ndef CONFIG_SPL_FRAMEWORK instead > of def CONFIG_DM macro to include call to dm_init_and_scan(). > As dm_init_and_scan() is called as part of common SPL framework, > so no need to call it again but in case of powerpc platforms which > currently do not use common SPL framework, so need to include this > function call here. > > arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 +-- > arch/powerpc/cpu/mpc85xx/start.S | 11 ++++++-- > arch/powerpc/include/asm/fsl_secure_boot.h | 10 ++++++- > board/freescale/t104xrdb/t104x_pbi_sb.cfg | 38 > ++++++++++++++++++++++++++ > board/freescale/t104xrdb/tlb.c | 15 +++++++++- > configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig | 30 ++++++++++++++++++++ > include/configs/T104xRDB.h | 29 +++++++++++++++++++- > 7 files changed, 129 insertions(+), 8 deletions(-) > create mode 100644 board/freescale/t104xrdb/t104x_pbi_sb.cfg > create mode 100644 configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
Reviewed-by: Simon Glass <s...@chromium.org> nit: please check comment style, as mentioned on the first patch. - Simon _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
