On Tuesday 24 May 2016 12:02 AM, Suman Anna wrote: > The current OPP_NOM voltage values defined for the MPU and CORE > voltage domains are based on the initial DRA75x_74x_SR1.1_DM data > manual. As per this DM, the PMIC boot voltage can be set to either > 1.10V or 1.15V for VD_MPU, and either 1.06V or 1.15V for VD_CORE. > While the current values are correct, the latter set of values > are the values that are common across all DRA75x, DRA72x SoCs and > for all current Silicon revisions. So, update both the MPU and CORE > OPP_NOM voltages to 1.15V. > > The macros are also slightly reorganized so that both the MPU and > CORE voltage domain values are defined together. > > Signed-off-by: Suman Anna <s-a...@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvu...@ti.com> Thanks and regards, Lokesh > --- > arch/arm/include/asm/arch-omap5/clock.h | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/include/asm/arch-omap5/clock.h > b/arch/arm/include/asm/arch-omap5/clock.h > index 38d50d6..9180c67 100644 > --- a/arch/arm/include/asm/arch-omap5/clock.h > +++ b/arch/arm/include/asm/arch-omap5/clock.h > @@ -240,17 +240,17 @@ > #define VDD_MM_ES2_LOW 880 > > /* DRA74x/75x voltage settings in mv for OPP_NOM per DM */ > -#define VDD_MPU_DRA752 1100 > +#define VDD_MPU_DRA752 1150 > +#define VDD_CORE_DRA752 1150 > #define VDD_EVE_DRA752 1060 > #define VDD_GPU_DRA752 1060 > -#define VDD_CORE_DRA752 1060 > #define VDD_IVA_DRA752 1060 > > /* DRA72x voltage settings in mv for OPP_NOM per DM */ > -#define VDD_MPU_DRA72x 1100 > +#define VDD_MPU_DRA72x 1150 > +#define VDD_CORE_DRA72x 1150 > #define VDD_EVE_DRA72x 1060 > #define VDD_GPU_DRA72x 1060 > -#define VDD_CORE_DRA72x 1060 > #define VDD_IVA_DRA72x 1060 > > /* Efuse register offsets for DRA7xx platform */ > _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
