From: Alban Bedel <[email protected]> When running on a SoC with a secure bootloader CoreSight isn't allowed, so add an option to disable the CoreSight init.
Signed-off-by: Alban Bedel <[email protected]> Reviewed-by: Julian Scheel <[email protected]> Signed-off-by: Julian Scheel <[email protected]> --- arch/arm/mach-tegra/Kconfig | 4 ++++ arch/arm/mach-tegra/cpu.c | 2 ++ 2 files changed, 6 insertions(+) diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index ba6983f..9fa3038 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -70,6 +70,10 @@ config TEGRA_DISCONNECT_UDC_ON_BOOT config SYS_MALLOC_F_LEN default 0x1800 +config ENABLE_CORESIGHT + bool "Enable CoreSight" + default y + source "arch/arm/mach-tegra/tegra20/Kconfig" source "arch/arm/mach-tegra/tegra30/Kconfig" source "arch/arm/mach-tegra/tegra114/Kconfig" diff --git a/arch/arm/mach-tegra/cpu.c b/arch/arm/mach-tegra/cpu.c index a3ebb57..23edaf0 100644 --- a/arch/arm/mach-tegra/cpu.c +++ b/arch/arm/mach-tegra/cpu.c @@ -377,6 +377,7 @@ void reset_A9_cpu(int reset) void clock_enable_coresight(int enable) { +#if defined(CONFIG_ENABLE_CORESIGHT) u32 rst, src = 2; debug("%s entry\n", __func__); @@ -402,6 +403,7 @@ void clock_enable_coresight(int enable) writel(rst, CSITE_CPU_DBG3_LAR); } } +#endif } void halt_avp(void) -- 2.8.0 _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
