From: Stephen Warren <swar...@nvidia.com>
The initialization performed by this code is SoC-specific not board-
specific. It also solely touches MMC controller registers. As such, it
should be part of the MMC driver itself. Move it there.
Signed-off-by: Stephen Warren <swar...@nvidia.com>
---
arch/arm/include/asm/arch-tegra/tegra_mmc.h | 2 --
arch/arm/mach-tegra/board2.c | 29 --------------------------
drivers/mmc/tegra_mmc.c | 32 +++++++++++++++++++++++++++--
3 files changed, 30 insertions(+), 33 deletions(-)
diff --git a/arch/arm/include/asm/arch-tegra/tegra_mmc.h
b/arch/arm/include/asm/arch-tegra/tegra_mmc.h
index 9b371add1de4..adc9772a3c18 100644
--- a/arch/arm/include/asm/arch-tegra/tegra_mmc.h
+++ b/arch/arm/include/asm/arch-tegra/tegra_mmc.h
@@ -142,6 +142,4 @@ struct mmc_host {
struct mmc_config cfg; /* mmc configuration */
};
-void pad_init_mmc(struct mmc_host *host);
-
#endif /* __TEGRA_MMC_H_ */
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 33e346017a8b..98fd94646909 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -31,7 +31,6 @@
#include <usb.h>
#endif
#ifdef CONFIG_TEGRA_MMC
-#include <asm/arch-tegra/tegra_mmc.h>
#include <asm/arch-tegra/mmc.h>
#endif
#include <asm/arch-tegra/xusb-padctl.h>
@@ -246,34 +245,6 @@ int board_mmc_init(bd_t *bd)
return 0;
}
-
-void pad_init_mmc(struct mmc_host *host)
-{
-#if defined(CONFIG_TEGRA30)
- enum periph_id id = host->mmc_id;
- u32 val;
-
- debug("%s: sdmmc address = %08x, id = %d\n", __func__,
- (unsigned int)host->reg, id);
-
- /* Set the pad drive strength for SDMMC1 or 3 only */
- if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
- debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
- __func__);
- return;
- }
-
- val = readl(&host->reg->sdmemcmppadctl);
- val &= 0xFFFFFFF0;
- val |= MEMCOMP_PADCTRL_VREF;
- writel(val, &host->reg->sdmemcmppadctl);
-
- val = readl(&host->reg->autocalcfg);
- val &= 0xFFFF0000;
- val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
- writel(val, &host->reg->autocalcfg);
-#endif /* T30 */
-}
#endif /* MMC */
/*
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
index 573819a01e21..23c6c2cf4583 100644
--- a/drivers/mmc/tegra_mmc.c
+++ b/drivers/mmc/tegra_mmc.c
@@ -1,8 +1,8 @@
/*
+ * Copyright 2011-2016 NVIDIA Corporation
* (C) Copyright 2009 SAMSUNG Electronics
* Minkyu Kang <mk7.k...@samsung.com>
* Jaehoon Chung <jh80.ch...@samsung.com>
- * Portions Copyright 2011-2015 NVIDIA Corporation
*
* SPDX-License-Identifier: GPL-2.0+
*/
@@ -428,6 +428,34 @@ static void tegra_mmc_set_ios(struct mmc *mmc)
debug("mmc_set_ios: hostctl = %08X\n", ctrl);
}
+static void tegra_mmc_pad_init(struct mmc_host *host)
+{
+#if defined(CONFIG_TEGRA30)
+ enum periph_id id = host->mmc_id;
+ u32 val;
+
+ debug("%s: sdmmc address = %08x, id = %d\n", __func__,
+ (unsigned int)host->reg, id);
+
+ /* Set the pad drive strength for SDMMC1 or 3 only */
+ if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
+ debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
+ __func__);
+ return;
+ }
+
+ val = readl(&host->reg->sdmemcmppadctl);
+ val &= 0xFFFFFFF0;
+ val |= MEMCOMP_PADCTRL_VREF;
+ writel(val, &host->reg->sdmemcmppadctl);
+
+ val = readl(&host->reg->autocalcfg);
+ val &= 0xFFFF0000;
+ val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
+ writel(val, &host->reg->autocalcfg);
+#endif /* T30 */
+}
+
static void mmc_reset(struct mmc_host *host, struct mmc *mmc)
{
unsigned int timeout;
@@ -461,7 +489,7 @@ static void mmc_reset(struct mmc_host *host, struct mmc
*mmc)
readb(&host->reg->pwrcon), readb(&host->reg->hostctl));
/* Make sure SDIO pads are set up */
- pad_init_mmc(host);
+ tegra_mmc_pad_init(host);
}
static int tegra_mmc_core_init(struct mmc *mmc)
--
2.8.1
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