On 04/05/2016 12:40 PM, Michal Simek wrote: > On 5.4.2016 19:23, Dan Murphy wrote: >> Add the device tree bindings and the accompanying documentation >> for the TI DP83867 Giga bit ethernet phy driver. >> >> The original document was from: >> [commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel] >> >> Signed-off-by: Dan Murphy <dmur...@ti.com> >> --- >> >> v2 - Align the documentation with the actual bindings - >> https://patchwork.ozlabs.org/patch/606502/ >> >> doc/device-tree-bindings/net/ti,dp83867.txt | 28 +++++++++++++++++++++++ >> include/dt-bindings/net/ti-dp83867.h | 35 >> +++++++++++++++++++++++++++++ >> 2 files changed, 63 insertions(+) >> create mode 100644 doc/device-tree-bindings/net/ti,dp83867.txt >> create mode 100644 include/dt-bindings/net/ti-dp83867.h >> >> diff --git a/doc/device-tree-bindings/net/ti,dp83867.txt >> b/doc/device-tree-bindings/net/ti,dp83867.txt >> new file mode 100644 >> index 0000000..34b1c35 >> --- /dev/null >> +++ b/doc/device-tree-bindings/net/ti,dp83867.txt >> @@ -0,0 +1,28 @@ >> +* Texas Instruments - dp83867 Giga bit ethernet phy >> + >> +Required properties: >> + - ti,rx_int_delay - RGMII Recieve Clock Delay - see >> dt-bindings/net/ti-dp83867.h >> + for applicable values >> + - ti,tx_int_delay - RGMII Transmit Clock Delay - see >> dt-bindings/net/ti-dp83867.h >> + for applicable values >> + - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h >> + for applicable values >> + >> +Default child nodes are standard Ethernet PHY device >> +nodes as described in doc/devicetree/bindings/net/ethernet.txt >> + >> +Example: >> + >> +&mac { >> + pinctrl-0 = <&davinci_mdio_default>; >> + pinctrl-1 = <&davinci_mdio_sleep>; >> + status = "okay"; >> + >> + ti,rx_int_delay = <DP83867_RGMIIDCTL_1_50_NS>; >> + ti,tx_int_delay = <DP83867_RGMIIDCTL_2_50_NS>; >> + ti,fifo_depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; >> + >> +}; >> + >> +Datasheet can be found: >> +http://www.ti.com/product/DP83867IR/datasheet >> diff --git a/include/dt-bindings/net/ti-dp83867.h >> b/include/dt-bindings/net/ti-dp83867.h >> new file mode 100644 >> index 0000000..5c592fb >> --- /dev/null >> +++ b/include/dt-bindings/net/ti-dp83867.h >> @@ -0,0 +1,35 @@ >> +/* >> + * TI DP83867 PHY drivers >> + * >> + * SPDX-License-Identifier: GPL-2.0 >> + * >> + */ >> + >> +#ifndef _DT_BINDINGS_TI_DP83867_H >> +#define _DT_BINDINGS_TI_DP83867_H >> + >> +/* PHY CTRL bits */ >> +#define DP83867_PHYCR_FIFO_DEPTH_3_B_NIB 0x00 >> +#define DP83867_PHYCR_FIFO_DEPTH_4_B_NIB 0x01 >> +#define DP83867_PHYCR_FIFO_DEPTH_6_B_NIB 0x02 >> +#define DP83867_PHYCR_FIFO_DEPTH_8_B_NIB 0x03 >> + >> +/* RGMIIDCTL internal delay for rx and tx */ >> +#define DP83867_RGMIIDCTL_250_PS 0x0 >> +#define DP83867_RGMIIDCTL_500_PS 0x1 >> +#define DP83867_RGMIIDCTL_750_PS 0x2 >> +#define DP83867_RGMIIDCTL_1_NS 0x3 >> +#define DP83867_RGMIIDCTL_1_25_NS 0x4 >> +#define DP83867_RGMIIDCTL_1_50_NS 0x5 >> +#define DP83867_RGMIIDCTL_1_75_NS 0x6 >> +#define DP83867_RGMIIDCTL_2_00_NS 0x7 >> +#define DP83867_RGMIIDCTL_2_25_NS 0x8 >> +#define DP83867_RGMIIDCTL_2_50_NS 0x9 >> +#define DP83867_RGMIIDCTL_2_75_NS 0xa >> +#define DP83867_RGMIIDCTL_3_00_NS 0xb >> +#define DP83867_RGMIIDCTL_3_25_NS 0xc >> +#define DP83867_RGMIIDCTL_3_50_NS 0xd >> +#define DP83867_RGMIIDCTL_3_75_NS 0xe >> +#define DP83867_RGMIIDCTL_4_00_NS 0xf >> + >> +#endif >> > Nack from me. Just follow Linux binding instead of create new one.
Why a nack? This comes from the Linux kernel mainline code I submited. I am not creating anything new. This technically should have come in with the original port of the driver I pushed to the Linux kernel. But I defer to the Tom for the resolution. Dan > Thanks, > Michal > -- ------------------ Dan Murphy _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
