On Monday 04 April 2016 10:52 PM, Scott Wood wrote:
> On Fri, 2016-04-01 at 16:59 +0530, Mugunthan V N wrote:
>> adopt omap_gpmc driver to driver model.
>>
>> Signed-off-by: Mugunthan V N <mugunthan...@ti.com>
>> ---
>>  drivers/mtd/nand/omap_gpmc.c | 205
>> +++++++++++++++++++++++++++++++++++++++++++
>>  1 file changed, 205 insertions(+)
>>
>> diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
>> index 4814fa2..df63491 100644
>> --- a/drivers/mtd/nand/omap_gpmc.c
>> +++ b/drivers/mtd/nand/omap_gpmc.c
>> @@ -16,6 +16,10 @@
>>  #include <nand.h>
>>  #include <linux/mtd/omap_elm.h>
>>  
>> +#include <dm.h>
>> +
>> +DECLARE_GLOBAL_DATA_PTR;
>> +
>>  #define BADBLOCK_MARKER_LENGTH      2
>>  #define SECTOR_BYTES                512
>>  #define ECCCLEAR            (0x1 << 8)
>> @@ -46,11 +50,22 @@ struct omap_nand_info {
>>      enum omap_ecc ecc_scheme;
>>      uint8_t cs;
>>      uint8_t ws;             /* wait status pin (0,1) */
>> +    uint8_t bus_width;      /* Bus width of NAND device */
>>  };
>>  
>> +#ifndef CONFIG_DM_NAND
>>  /* We are wasting a bit of memory but al least we are safe */
>>  static struct omap_nand_info omap_nand_info[GPMC_MAX_CS];
>>  
>> +#else
>> +
>> +struct omap_gpmc_platdata {
>> +    struct omap_nand_info *omap_nand_info;
>> +    struct gpmc *gpmc_cfg;
>> +    int max_cs;
>> +};
>> +#endif
>> +
>>  /*
>>   * omap_nand_hwcontrol - Set the address pointers corretly for the
>>   *                  following address/data/command operation
>> @@ -943,6 +958,8 @@ int __maybe_unused omap_nand_switch_ecc(uint32_t
>> hardware, uint32_t eccstrength)
>>  }
>>  #endif /* CONFIG_SPL_BUILD */
>>  
>> +#ifndef CONFIG_DM_NAND
>> +
>>  /*
>>   * Board-specific NAND initialization. The following members of the
>>   * argument are board-specific:
>> @@ -1034,3 +1051,191 @@ int board_nand_init(struct nand_chip *nand)
>>  
>>      return 0;
>>  }
> 
>> +
>> +#else /* CONFIG_DM_NAND */
>> +
>> +static int omap_gpmc_probe(struct udevice *dev)
>> +{
>> +    struct nand_chip *nand = dev_get_priv(dev);
>> +    struct omap_gpmc_platdata *pdata = dev_get_platdata(dev);
>> +    struct gpmc *gpmc_cfg = pdata->gpmc_cfg;
>> +    int32_t gpmc_config = 0;
>> +    int ecc_opt;
>> +    int cs = cs_next++;
>> +    int err = 0;
>> +
>> +    while (cs < pdata->max_cs) {
>> +            /* Check if NAND type is set */
>> +            if ((readl(&gpmc_cfg->cs[cs].config1) & 0xC00) == 0x800) {
>> +                    /* Found it!! */
>> +                    break;
>> +            }
>> +            cs++;
>> +    }
>> +
>> +    if (cs >= pdata->max_cs) {
>> +            printf("nand: error: Unable to find NAND settings in GPMC
>> Configuration - quitting\n");
>> +            return -ENODEV;
>> +    }
>> +
>> +    gpmc_config = readl(&gpmc_cfg->config);
>> +    /* Disable Write protect */
>> +    gpmc_config |= 0x10;
>> +    writel(gpmc_config, &gpmc_cfg->config);
>> +
>> +    nand->IO_ADDR_R = (void __iomem *)&gpmc_cfg->cs[cs].nand_dat;
>> +    nand->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_cmd;
>> +    nand->priv      = &pdata->omap_nand_info[cs];
>> +    nand->cmd_ctrl  = omap_nand_hwcontrol;
>> +    nand->options   |= NAND_NO_PADDING | NAND_CACHEPRG;
>> +    nand->chip_delay = 100;
>> +    nand->ecc.layout = &omap_ecclayout;
>> +
>> +    /* configure driver and controller based on NAND device bus-width
>> */
>> +    gpmc_config = readl(&gpmc_cfg->cs[cs].config1);
>> +    if (pdata->omap_nand_info[cs].bus_width == 16) {
>> +            nand->options |= NAND_BUSWIDTH_16;
>> +            writel(gpmc_config | (0x1 << 12), &gpmc_cfg
>> ->cs[cs].config1);
>> +    } else {
>> +            nand->options &= ~NAND_BUSWIDTH_16;
>> +            writel(gpmc_config & ~(0x1 << 12), &gpmc_cfg
>> ->cs[cs].config1);
>> +    }
>> +
>> +    ecc_opt = pdata->omap_nand_info[cs].ecc_scheme;
>> +    /* select ECC scheme */
>> +    if (ecc_opt != OMAP_ECC_HAM1_CODE_SW) {
>> +            err = omap_select_ecc_scheme(nand, ecc_opt,
>> +                                         CONFIG_SYS_NAND_PAGE_SIZE,
>> +                                         CONFIG_SYS_NAND_OOBSIZE);
>> +    } else {
>> +            /*
>> +             * pagesize and oobsize are not required to
>> +             * configure sw ecc-scheme
>> +             */
>> +            err = omap_select_ecc_scheme(nand, ecc_opt, 0, 0);
>> +    }
>> +    if (err)
>> +            return err;
>> +
>> +#ifdef CONFIG_NAND_OMAP_GPMC_PREFETCH
>> +    nand->read_buf = omap_nand_read_prefetch;
>> +#else
>> +    if (nand->options & NAND_BUSWIDTH_16)
>> +            nand->read_buf = nand_read_buf16;
>> +    else
>> +            nand->read_buf = nand_read_buf;
>> +#endif
>> +
>> +    nand->dev_ready = omap_dev_ready;
>> +
>> +    return 0;
>> +}
> 
> Is it really necessary to duplicate the entire probe func based on DM?
> 

It is not duplicated directly, if it is duplicate I would had a fuction
defined and call it in both DM and non-DM case. Removed some of the
#if/else. Only TODO I left is I have not remove nand driver callbacks
and move it to DM ops structure, which will be done soon.

Regards
Mugunthan V N

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