> -----Original Message-----
> From: York Sun [mailto:[email protected]]
> Sent: Tuesday, March 29, 2016 12:30 AM
> To: U-Boot Mailing List <[email protected]>
> Cc: Stuart Yoder <[email protected]>; Scott Wood <[email protected]>;
> Huan Wang <[email protected]>; york sun <[email protected]>;
> Prabhakar Kushwaha <[email protected]>; Ramneek Mehresh
> <[email protected]>; Pratiyush Mohan Srivastava
> <[email protected]>; Stuart Yoder
> <[email protected]>; Li Yang <[email protected]>; Hou Zhiqiang
> <[email protected]>; Shaohui Xie <[email protected]>;
> Aneesh Bansal <[email protected]>; Jaiprakash Singh
> <[email protected]>; Mingkai Hu <[email protected]>;
> Haiying Wang <[email protected]>; Albert Aribaud
> <[email protected]>; Minghuan Lian
> <[email protected]>; Alexander Graf <[email protected]>; Lijun
> Pan <[email protected]>; Scott Wood <[email protected]>;
> Gong Qianyu <[email protected]>; Itai Katz <[email protected]>;
> Joe Hershberger <[email protected]>; Prabhakar Kushwaha
> <[email protected]>; J. German Rivera
> <[email protected]>; Simon Glass <[email protected]>;
> Shengzhou Liu <[email protected]>; Bin Meng
> <[email protected]>; Bhupesh Sharma
> <[email protected]>; Qianyu Gong <[email protected]>;
> Ashish Kumar <[email protected]>; Thomas Chou
> <[email protected]>; Tang Yuantian <[email protected]>;
> Alison Wang <[email protected]>
> Subject: [PATCH v2] armv8: LS2080A: Consolidate LS2080A and LS2085A
>
> LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA
> DDR. The RDB and QDS boards support both personality. By detecting the
> SVR at runtime, a single image per board can support both SoCs. It gives
> users flexibility to swtich SoC without the need to reprogram the board.
>
> Signed-off-by: York Sun <[email protected]>
> CC: Prabhakar Kushwaha <[email protected]>
>
> ---
>
> Changes in v2:
> Add checking for SVR before starting AIOP Drop RFC from subject
>
> arch/arm/cpu/armv8/fsl-layerscape/Makefile | 4 ---
> arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 9 ++++---
> .../arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c | 6 ++++-
> arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 2 +-
> arch/arm/cpu/armv8/fsl-layerscape/soc.c | 26
> ++++++++++++++++++-
> arch/arm/cpu/armv8/fsl-layerscape/spl.c | 4 +--
> arch/arm/include/asm/arch-fsl-layerscape/config.h | 9 ++-----
> arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 2 +-
> .../include/asm/arch-fsl-layerscape/fsl_serdes.h | 2 +-
> arch/arm/include/asm/arch-fsl-layerscape/soc.h | 3 +++
> board/freescale/ls2080a/ddr.c | 27
> +++++++++++---------
> board/freescale/ls2080a/ls2080a.c | 2 +-
> board/freescale/ls2080aqds/MAINTAINERS | 2 --
> board/freescale/ls2080aqds/ddr.c | 27
> +++++++++++---------
> board/freescale/ls2080aqds/ls2080aqds.c | 2 +-
> board/freescale/ls2080ardb/MAINTAINERS | 2 --
> board/freescale/ls2080ardb/ddr.c | 27
> +++++++++++---------
> board/freescale/ls2080ardb/ls2080ardb.c | 2 +-
> configs/ls2085aqds_defconfig | 19 --------------
> configs/ls2085aqds_nand_defconfig | 14 ----------
> configs/ls2085ardb_defconfig | 19 --------------
> configs/ls2085ardb_nand_defconfig | 14 ----------
> drivers/net/fsl-mc/mc.c | 4 +++
> drivers/net/ldpaa_eth/Makefile | 1 -
> include/configs/ls2080a_common.h | 7 +----
> include/configs/ls2080a_emu.h | 7 -----
> include/configs/ls2080a_simu.h | 7 -----
> include/linux/usb/xhci-fsl.h | 2 +-
> 28 files changed, 100 insertions(+), 152 deletions(-) delete mode 100644
> configs/ls2085aqds_defconfig delete mode 100644
> configs/ls2085aqds_nand_defconfig delete mode 100644
> configs/ls2085ardb_defconfig delete mode 100644
> configs/ls2085ardb_nand_defconfig
>
<snip>
> diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c index
> f83bd0c..98b1636 100644
> --- a/drivers/net/fsl-mc/mc.c
> +++ b/drivers/net/fsl-mc/mc.c
> @@ -363,6 +363,9 @@ static int load_mc_aiop_img(u64 aiop_fw_addr)
> void *aiop_img;
> #endif
>
> + /* Check if AIOP is available */
> + if (!soc_has_aiop)
> + return -ENODEV;
> /*
> * Load the MC AIOP image in the MC private DRAM block:
> */
> @@ -1235,6 +1238,7 @@ static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int
> argc, char * const argv[])
> aiop_fw_addr = simple_strtoull(argv[3],
> NULL,
> 16);
>
> + /* if SoC doesn't have AIOP, err = -ENODEV
> */
> err = load_mc_aiop_img(aiop_fw_addr);
> if (!err)
> printf("fsl-mc: AIOP FW applied\n");
I am not seeing any svr check. Are we expecting load_mc_aiop_img to return
-ENODEV.
This patch does not contain modification in load_mc_aiop_img for SVR check.
--prabhakar
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